@@ -93,36 +93,30 @@ extern int vmpu_fault_recovery_mpu(uint32_t pc, uint32_t sp, uint32_t fault_addr
9393
9494uint32_t vmpu_unpriv_access (uint32_t addr , uint32_t size , uint32_t data )
9595{
96- unsigned int tries = 0 ;
97- while (1 ) {
98- //if ((vmpu_unpriv_test_range(addr, UVISOR_UNPRIV_ACCESS_SIZE(size)) & (TT_RESP_NSRW_Msk | TT_RESP_SRVALID_Msk)) == (TT_RESP_NSRW_Msk | TT_RESP_SRVALID_Msk)) {
99- //this should be slower substantualy
100- if (vmpu_buffer_access_is_ok (g_active_box , addr , UVISOR_UNPRIV_ACCESS_SIZE (size ))){
101- switch (size ) {
102- case UVISOR_UNPRIV_ACCESS_READ (1 ):
103- return * ((uint8_t * ) addr );
104- case UVISOR_UNPRIV_ACCESS_READ (2 ):
105- return * ((uint16_t * ) addr );
106- case UVISOR_UNPRIV_ACCESS_READ (4 ):
107- return * ((uint32_t * ) addr );
108- case UVISOR_UNPRIV_ACCESS_WRITE (1 ):
109- * ((uint8_t * ) addr ) = (uint8_t ) data ;
110- return 0 ;
111- case UVISOR_UNPRIV_ACCESS_WRITE (2 ):
112- * ((uint16_t * ) addr ) = (uint16_t ) data ;
113- return 0 ;
114- case UVISOR_UNPRIV_ACCESS_WRITE (4 ):
115- * ((uint32_t * ) addr ) = data ;
116- return 0 ;
117- default :
118- break ;
119- }
120- break ;
121- }
122- if (++ tries > 1 || !vmpu_fault_recovery_mpu (0 , 0 , addr , 0 )) {
123- break ;
96+ //if ((vmpu_unpriv_test_range(addr, UVISOR_UNPRIV_ACCESS_SIZE(size)) & (TT_RESP_NSRW_Msk | TT_RESP_SRVALID_Msk)) == (TT_RESP_NSRW_Msk | TT_RESP_SRVALID_Msk)) {
97+ //this should be slower substantualy
98+ if (vmpu_buffer_access_is_ok (g_active_box , addr , UVISOR_UNPRIV_ACCESS_SIZE (size ))){
99+ switch (size ) {
100+ case UVISOR_UNPRIV_ACCESS_READ (1 ):
101+ return * ((uint8_t * ) addr );
102+ case UVISOR_UNPRIV_ACCESS_READ (2 ):
103+ return * ((uint16_t * ) addr );
104+ case UVISOR_UNPRIV_ACCESS_READ (4 ):
105+ return * ((uint32_t * ) addr );
106+ case UVISOR_UNPRIV_ACCESS_WRITE (1 ):
107+ * ((uint8_t * ) addr ) = (uint8_t ) data ;
108+ return 0 ;
109+ case UVISOR_UNPRIV_ACCESS_WRITE (2 ):
110+ * ((uint16_t * ) addr ) = (uint16_t ) data ;
111+ return 0 ;
112+ case UVISOR_UNPRIV_ACCESS_WRITE (4 ):
113+ * ((uint32_t * ) addr ) = data ;
114+ return 0 ;
115+ default :
116+ break ;
124117 }
125118 }
119+
126120 HALT_ERROR (PERMISSION_DENIED , "Access to restricted resource denied" );
127121 return 0 ;
128122}
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