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lines changed Original file line number Diff line number Diff line change 1+ from pprint import pformat
2+
13from chipflow_lib .platforms .sim import SimPlatform
24from chipflow_lib .software .soft_gen import SoftwareGenerator
35
@@ -135,6 +137,7 @@ def elaborate(self, platform):
135137 csr_decoder .add (spiflash .csr_bus , name = "spiflash" , addr = self .csr_spiflash_base - self .csr_base )
136138 m .submodules .spiflash = spiflash
137139
140+ print (f"spiflash = { spiflash } " )
138141 connect (m , flipped (self .flash ), spiflash .pins )
139142
140143 sw .add_periph ("spiflash" , "SPIFLASH" , self .csr_spiflash_base )
@@ -238,6 +241,11 @@ def elaborate(self, platform):
238241
239242 sw .generate ("build/software/generated" )
240243 attach_simulation_data (self .flash , file_name = "build/software/software.bin" , offset = self .bios_start )
244+
245+ print (f"CSR resources :\n { pformat (list (csr_decoder .bus .memory_map .all_resources ()), indent = 2 )} " )
246+ print (f"CSR memory map:\n { pformat (csr_decoder .bus .memory_map ._namespace ._assignments , indent = 2 )} " )
247+ print (f"CSR decoder subs:\n { pformat (csr_decoder ._subs , indent = 2 )} " )
248+ print (f"Wishbone memory map:\n { pformat (wb_decoder .bus .memory_map ._namespace ._assignments , indent = 2 )} " )
241249 return m
242250
243251
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