diff --git a/src/fl2000_i2c.c b/src/fl2000_i2c.c
index 8c86e6e..14009a8 100644
--- a/src/fl2000_i2c.c
+++ b/src/fl2000_i2c.c
@@ -25,7 +25,7 @@ fl2000_i2c_xfer(
 
 	dbg_msg(TRACE_LEVEL_VERBOSE, DBG_HW, ">>>>");
 
-	dev_ctx->ctrl_xfer_buf = *data;
+	dev_ctx->ctrl_xfer_buf = cpu_to_le32(*data);
 
 	if (is_read) {
 		bRequest = REQUEST_I2C_COMMAND_READ;
@@ -51,7 +51,7 @@ fl2000_i2c_xfer(
 		CTRL_XFER_TIMEOUT);
 
 	if (is_read)
-		*data = dev_ctx->ctrl_xfer_buf;
+		*data = le32_to_cpu(dev_ctx->ctrl_xfer_buf);
 
 	return ret_val;
 }
diff --git a/src/fl2000_i2c.h b/src/fl2000_i2c.h
index d82ed6c..5d3454b 100644
--- a/src/fl2000_i2c.h
+++ b/src/fl2000_i2c.h
@@ -8,6 +8,8 @@
 #ifndef _VID_I2C_H_
 #define _VID_I2C_H_
 
+#include <asm/byteorder.h>
+
 #define I2C_ADDRESS_HDMI                        ( 0x4C )
 #define I2C_ADDRESS_DSUB                        ( 0x50 )
 #define I2C_ADDRESS_EEPROM                      ( 0x54 )
@@ -27,6 +29,19 @@ typedef union _I2C_DATA_
 {
     struct
     {
+#ifdef __BIG_ENDIAN
+	// Big endian host; most significant bit declared first
+	u32 OpStatus:1;        // I2C operation status.  0=in progress, 1=done.  SW shall not perform the next I2C operation when this bit is 0.  SW shall write 0 to clear this bit to start the next i2C
+	u32 Resv2:3;
+	u32 DataStatus:4;      // I2C status indicating passed/failed per byte. 0=passed, 1=failed
+	u32 Resv1:6;
+	u32 SpiEraseEnable:1;  // 1=SPI, 0=EEPROM.
+	u32 IsSpiOperation:1;  // 1=SPI, 0=EEPROM.
+	u32 offset:8;          // I2C offset.  Bit 9:8 shall be written 0.
+	u32 RW:1;              // 1=I2C read, 0=I2C write
+	u32 Addr:7;            // I2C address
+#else
+	// Little endian host; least significant bit declared first
 	u32 Addr:7;            // I2C address
 	u32 RW:1;              // 1=I2C read, 0=I2C write
 	u32 offset:8;          // I2C offset.  Bit 9:8 shall be written 0.
@@ -36,6 +51,7 @@ typedef union _I2C_DATA_
 	u32 DataStatus:4;      // I2C status indicating passed/failed per byte. 0=passed, 1=failed
 	u32 Resv2:3;
 	u32 OpStatus:1;        // I2C operation status.  0=in progress, 1=done.  SW shall not perform the next I2C operation when this bit is 0.  SW shall write 0 to clear this bit to start the next i2C
+#endif
     } s;
 
     u32 value;
diff --git a/src/fl2000_interrupt.h b/src/fl2000_interrupt.h
index 7af7188..e720845 100644
--- a/src/fl2000_interrupt.h
+++ b/src/fl2000_interrupt.h
@@ -8,9 +8,38 @@
 #ifndef _FL2000_INTERRUPT_H_
 #define _FL2000_INTERRUPT_H_
 
+#include <asm/byteorder.h>
+
 struct vga_status {
 	union {
 	struct  {
+#ifdef __BIG_ENDIAN
+	// Big endian host; most significant bit declared first
+        uint32_t edid_connect_changed:1;
+        uint32_t ext_mon_connect_changed:1;
+        uint32_t ext_mon_connected:1;
+        uint32_t edid_connected:1;
+        uint32_t hdmi_enabled:1;
+        uint32_t hdmi_connection_changed:1;
+        uint32_t frame_count:16;
+        uint32_t line_buffer_overflow:1;
+        uint32_t line_buffer_underflow:1;
+        uint32_t dac_powered_up:1;
+        uint32_t pll_powered_up:1;
+        uint32_t intr_pending:1;
+
+        // Change status due to feedback algorithm has detected a drop of TD.
+        //
+        uint32_t feedback_dropped:1;
+
+	// Change status due to ISO ACK received and a feedback return packet has been sent to ISO Interrupt IN EP.
+	//
+	uint32_t isoch_ack_changed:1;
+	uint32_t line_buffer_halted:1;
+	uint32_t frame_dropped:1;
+	uint32_t connected:1;
+#else
+	// Little endian host; least significant bit declared first
 	uint32_t connected:1;
 	uint32_t frame_dropped:1;
 	uint32_t line_buffer_halted:1;
@@ -34,6 +63,7 @@ struct vga_status {
         uint32_t ext_mon_connected:1;
         uint32_t ext_mon_connect_changed:1;
         uint32_t edid_connect_changed:1;
+#endif
 	};
 
 	uint32_t value;