diff --git a/boards/infineon/kit_a2g_tc337/Kconfig.defconfig b/boards/infineon/kit_a2g_tc337/Kconfig.defconfig
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/boards/infineon/kit_a2g_tc337/Kconfig.kit_a2g_tc337 b/boards/infineon/kit_a2g_tc337/Kconfig.kit_a2g_tc337
new file mode 100644
index 0000000000000..fc7e51fa32297
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc337/Kconfig.kit_a2g_tc337
@@ -0,0 +1,6 @@
+# Copyright 2024 Infineon Technologies AG
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_KIT_A2G_TC337
+	bool "Infineon A2G TC337 Starter Kit"
+	select SOC_TC337LP
diff --git a/boards/infineon/kit_a2g_tc337/board.yml b/boards/infineon/kit_a2g_tc337/board.yml
new file mode 100644
index 0000000000000..548e4aa1785ea
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc337/board.yml
@@ -0,0 +1,5 @@
+board:
+  name: kit_a2g_tc337
+  vendor: infineon
+  socs:
+    - name: tc337lp
diff --git a/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.dts b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.dts
new file mode 100644
index 0000000000000..92ee7f21516da
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2024 Infineon Technologies AG
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <infineon/tc337lp.dtsi>
+
+/ {
+	model = "Infineon TC337 Starter Kit";
+	compatible = "infineon,kit_a2g_tc337", "infineon,tc337lp",
+						"infineon,tc3xx";
+
+	chosen {
+		zephyr,flash = &flash0;
+		zephyr,sram = &dsram0;
+		zephyr,itcm = &psram0;
+		zephyr,console = &uart0;
+		infineon,system-timer = &stm0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&p33 4 GPIO_ACTIVE_LOW>;
+		};
+		led1: led_1 {
+			gpios = <&p00 6 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	aliases {
+		led0 = &led0;
+    };
+
+	can_phy0: can-phy0 {
+		compatible = "infineon,tle9251v", "can-transceiver-gpio";
+		standby-gpios = <&p20 6 0>;
+		max-bitrate = <5000000>;
+		#phy-cells = <0>;
+	};
+};
+
+&fosc {
+	clock-frequency = <DT_FREQ_M(20)>;
+	status = "okay";
+};
+
+&stm0 {
+	status = "okay";
+	freeze;
+};
+
+&p00 {
+	status = "okay";
+};
+
+&p20 {
+	status = "okay";
+};
+
+&p33 {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+	pinctrl-0 = <&asclin0_tx_p14_0>, <&asclin0_rx_p14_1>;
+	pinctrl-names = "default";
+};
+
+&mcmcan0 {
+	status = "okay";
+};
+
+&mcmcan1 {
+	status = "okay";
+};
+
+&can00 {
+	status = "okay";
+	bus-speed = <500000>;
+	bus-speed-data = <2000000>;
+	pinctrl-0 = <&can00_tx_p20_8>, <&can00_rx_p20_7>;
+	pinctrl-names = "default";
+	phys = <&can_phy0>;
+};
\ No newline at end of file
diff --git a/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.yaml b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.yaml
new file mode 100644
index 0000000000000..92459118597cd
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337.yaml
@@ -0,0 +1,19 @@
+identifier: kit_a2g_tc337
+name: A2G TC337 Starter Kit
+type: mcu
+arch: tricore
+toolchain:
+  - zephyr
+supported:
+  - gpio
+  - i2c
+  - watchdog
+  - uart
+  - can
+  - pwm
+  - spi
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+vendor: infineon
\ No newline at end of file
diff --git a/boards/infineon/kit_a2g_tc337/kit_a2g_tc337_defconfig b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337_defconfig
new file mode 100644
index 0000000000000..b782dda5098a9
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc337/kit_a2g_tc337_defconfig
@@ -0,0 +1,8 @@
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
+
+CONFIG_SERIAL=y
+CONFIG_GPIO=y
+CONFIG_LED=y
+
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
diff --git a/boards/infineon/kit_a2g_tc375_lite/kit_a2g_tc375_lite.yaml b/boards/infineon/kit_a2g_tc375_lite/kit_a2g_tc375_lite.yaml
new file mode 100644
index 0000000000000..24e5d39cc9bc7
--- /dev/null
+++ b/boards/infineon/kit_a2g_tc375_lite/kit_a2g_tc375_lite.yaml
@@ -0,0 +1,19 @@
+identifier: kit_a2g_tc375_lite
+name: A2G TC375 Litekit
+type: mcu
+arch: tricore
+toolchain:
+  - zephyr
+supported:
+  - gpio
+  - i2c
+  - watchdog
+  - uart
+  - can
+  - pwm
+  - spi
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+vendor: infineon
\ No newline at end of file
diff --git a/cmake/compiler/gcc/target_tricore.cmake b/cmake/compiler/gcc/target_tricore.cmake
index 8a5b21ca6b06d..c61a0bdf4026b 100644
--- a/cmake/compiler/gcc/target_tricore.cmake
+++ b/cmake/compiler/gcc/target_tricore.cmake
@@ -4,4 +4,4 @@ set(TRICORE_C_FLAGS)
 list(APPEND TRICORE_C_FLAGS -mcpu=${GCC_M_CPU})
 
 list(APPEND TOOLCHAIN_C_FLAGS ${TRICORE_C_FLAGS})
-list(APPEND TOOLCHAIN_LD_FLAGS NO_SPLIT ${TRICORE_C_FLAGS})
+list(APPEND TOOLCHAIN_LD_FLAGS ${TRICORE_C_FLAGS})
diff --git a/dts/tricore/infineon/tc337lp.dtsi b/dts/tricore/infineon/tc337lp.dtsi
new file mode 100644
index 0000000000000..5369d0a9d3404
--- /dev/null
+++ b/dts/tricore/infineon/tc337lp.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2024 Infineon Technologies AG
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <infineon/tc33x.dtsi>
+#include <infineon/tc33x-pinctrl.dtsi>
+
+/ {
+
+};
\ No newline at end of file
diff --git a/dts/tricore/infineon/tc33x-pinctrl.dtsi b/dts/tricore/infineon/tc33x-pinctrl.dtsi
new file mode 100644
index 0000000000000..08dc1d4ad8d85
--- /dev/null
+++ b/dts/tricore/infineon/tc33x-pinctrl.dtsi
@@ -0,0 +1,1149 @@
+/*
+* Copyright (c) 2024 Infineon Technologies AG
+* SPDX-License-Identifier: Apache-2.0
+*/
+
+#include <zephyr/dt-bindings/pinctrl/tc3xx-pinctrl.h>
+
+&p00 {
+	ngpios = <13>;
+};
+&p02 {
+	ngpios = <9>;
+};
+&p10 {
+	ngpios = <9>;
+};
+&p11 {
+	ngpios = <13>;
+	gpio-reserved-ranges = <4 2>, <7 2>;
+};
+&p13 {
+	ngpios = <4>;
+};
+&p14 {
+	ngpios = <11>;
+};
+&p15 {
+	ngpios = <9>;
+};
+&p20 {
+	ngpios = <15>;
+	gpio-reserved-ranges = <4 2>;
+};
+&p21 {
+	ngpios = <8>;
+};
+&p22 {
+	ngpios = <4>;
+};
+&p23 {
+	ngpios = <6>;
+};
+&p32 {
+	ngpios = <5>;
+};
+&p33 {
+	ngpios = <14>;
+};
+
+&pinctrl {
+	/omit-if-no-ref/ asclin0_cts_p14_9: asclin0_cts_p14_9 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 9, A)>;
+		pin-type = <1>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_rts_p14_7: asclin0_rts_p14_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 7, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin0_rx_p14_1: asclin0_rx_p14_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 1, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_rx_p15_3: asclin0_rx_p15_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 3, B)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_rx_p33_10: asclin0_rx_p33_10 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 10, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_sclk_p14_0: asclin0_sclk_p14_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 0, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_sclk_p15_2: asclin0_sclk_p15_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 2, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_tx_p14_0: asclin0_tx_p14_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_tx_p14_1: asclin0_tx_p14_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 1, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_tx_p15_2: asclin0_tx_p15_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 2, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_tx_p15_3: asclin0_tx_p15_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 3, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin0_tx_p33_9: asclin0_tx_p33_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 9, O6)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin1_cts_p20_7: asclin1_cts_p20_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 7, A)>;
+		pin-type = <1>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_cts_p32_4: asclin1_cts_p32_4 {
+		pinmux = <TC3XX_INPUT_PINMUX(32, 4, B)>;
+		pin-type = <1>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rts_p20_6: asclin1_rts_p20_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 6, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin1_rts_p23_1: asclin1_rts_p23_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 1, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rx_p2_3: asclin1_rx_p2_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 3, G)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin1_rx_p11_10: asclin1_rx_p11_10 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 10, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rx_p14_8: asclin1_rx_p14_8 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 8, D)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin1_rx_p15_1: asclin1_rx_p15_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 1, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rx_p15_5: asclin1_rx_p15_5 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 5, B)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rx_p20_9: asclin1_rx_p20_9 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 9, C)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_rx_p33_13: asclin1_rx_p33_13 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 13, F)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_sclk_p15_0: asclin1_sclk_p15_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 0, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_sclk_p20_10: asclin1_sclk_p20_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 10, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_sclk_p33_11: asclin1_sclk_p33_11 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 11, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_sclk_p33_12: asclin1_sclk_p33_12 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 12, O4)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_slso_p14_3: asclin1_slso_p14_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 3, O4)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin1_slso_p20_8: asclin1_slso_p20_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 8, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_slso_p33_10: asclin1_slso_p33_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 10, O4)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p2_2: asclin1_tx_p2_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 2, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p11_12: asclin1_tx_p11_12 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(11, 12, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p14_10: asclin1_tx_p14_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 10, O4)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p15_0: asclin1_tx_p15_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p15_1: asclin1_tx_p15_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 1, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p15_4: asclin1_tx_p15_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 4, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p15_5: asclin1_tx_p15_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 5, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p20_10: asclin1_tx_p20_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 10, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p33_12: asclin1_tx_p33_12 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 12, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin1_tx_p33_13: asclin1_tx_p33_13 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 13, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_cts_p10_7: asclin2_cts_p10_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 7, A)>;
+		pin-type = <1>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_cts_p33_5: asclin2_cts_p33_5 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 5, B)>;
+		pin-type = <1>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rts_p10_8: asclin2_rts_p10_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 8, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rts_p33_4: asclin2_rts_p33_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 4, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rx_p2_0: asclin2_rx_p2_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 0, G)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_rx_p2_1: asclin2_rx_p2_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 1, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rx_p10_6: asclin2_rx_p10_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 6, D)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rx_p14_3: asclin2_rx_p14_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 3, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_rx_p33_8: asclin2_rx_p33_8 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 8, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_sclk_p2_4: asclin2_sclk_p2_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 4, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_sclk_p10_6: asclin2_sclk_p10_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 6, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_sclk_p14_2: asclin2_sclk_p14_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 2, O6)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_sclk_p33_7: asclin2_sclk_p33_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 7, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_sclk_p33_9: asclin2_sclk_p33_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 9, O4)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_slso_p2_3: asclin2_slso_p2_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_slso_p10_5: asclin2_slso_p10_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 5, O6)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_slso_p33_6: asclin2_slso_p33_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 6, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_tx_p2_0: asclin2_tx_p2_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_tx_p10_5: asclin2_tx_p10_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 5, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_tx_p14_2: asclin2_tx_p14_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 2, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_tx_p14_3: asclin2_tx_p14_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin2_tx_p33_8: asclin2_tx_p33_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 8, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin2_tx_p33_9: asclin2_tx_p33_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 9, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_cts_p0_12: asclin3_cts_p0_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 12, A)>;
+		pin-type = <1>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_rts_p0_9: asclin3_rts_p0_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 9, O3)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_rx_p0_1: asclin3_rx_p0_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 1, E)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_rx_p15_7: asclin3_rx_p15_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 7, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_rx_p20_3: asclin3_rx_p20_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 3, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_rx_p21_6: asclin3_rx_p21_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 6, F)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_rx_p32_2: asclin3_rx_p32_2 {
+		pinmux = <TC3XX_INPUT_PINMUX(32, 2, D)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p0_0: asclin3_sclk_p0_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p0_2: asclin3_sclk_p0_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 2, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p15_6: asclin3_sclk_p15_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 6, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p15_8: asclin3_sclk_p15_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 8, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p20_0: asclin3_sclk_p20_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 0, O3)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p21_5: asclin3_sclk_p21_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 5, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p21_7: asclin3_sclk_p21_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 7, O3)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p32_3: asclin3_sclk_p32_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(32, 3, O4)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_sclk_p33_2: asclin3_sclk_p33_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 2, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_slso_p0_3: asclin3_slso_p0_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_slso_p14_3: asclin3_slso_p14_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 3, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_slso_p21_2: asclin3_slso_p21_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 2, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_slso_p21_6: asclin3_slso_p21_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 6, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_slso_p33_1: asclin3_slso_p33_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 1, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_tx_p0_0: asclin3_tx_p0_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 0, O3)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p0_1: asclin3_tx_p0_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 1, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_tx_p15_6: asclin3_tx_p15_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 6, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p15_7: asclin3_tx_p15_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 7, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p20_0: asclin3_tx_p20_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p20_3: asclin3_tx_p20_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_tx_p21_7: asclin3_tx_p21_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 7, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p22_0: asclin3_tx_p22_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(22, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p22_1: asclin3_tx_p22_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(22, 1, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin3_tx_p32_2: asclin3_tx_p32_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(32, 2, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin3_tx_p32_3: asclin3_tx_p32_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(32, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin4_rx_p0_12: asclin4_rx_p0_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 12, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin4_sclk_p0_10: asclin4_sclk_p0_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 10, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin4_slso_p0_11: asclin4_slso_p0_11 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 11, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin4_tx_p0_9: asclin4_tx_p0_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 9, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_rx_p0_6: asclin5_rx_p0_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 6, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_rx_p22_3: asclin5_rx_p22_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(22, 3, C)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin5_rx_p33_4: asclin5_rx_p33_4 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 4, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_sclk_p33_3: asclin5_sclk_p33_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_slso_p14_8: asclin5_slso_p14_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 8, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_slso_p33_5: asclin5_slso_p33_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 5, O7)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_tx_p0_7: asclin5_tx_p0_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 7, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin5_tx_p22_2: asclin5_tx_p22_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(22, 2, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin5_tx_p33_0: asclin5_tx_p33_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 0, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin6_rx_p22_0: asclin6_rx_p22_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(22, 0, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin6_rx_p23_1: asclin6_rx_p23_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(23, 1, F)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin6_rx_p23_3: asclin6_rx_p23_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(23, 3, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin6_sclk_p23_1: asclin6_sclk_p23_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 1, O7)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin6_slso_p23_4: asclin6_slso_p23_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 4, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin6_tx_p22_0: asclin6_tx_p22_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(22, 0, O7)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin6_tx_p23_5: asclin6_tx_p23_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 5, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin7_rx_p22_1: asclin7_rx_p22_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(22, 1, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin7_rx_p23_2: asclin7_rx_p23_2 {
+		pinmux = <TC3XX_INPUT_PINMUX(23, 2, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin7_slso_p14_8: asclin7_slso_p14_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 8, O3)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin7_tx_p22_1: asclin7_tx_p22_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(22, 1, O7)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin7_tx_p23_3: asclin7_tx_p23_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 3, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin8_rx_p33_1: asclin8_rx_p33_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 1, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin8_rx_p33_6: asclin8_rx_p33_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 6, D)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin8_sclk_p2_8: asclin8_sclk_p2_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 8, O3)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin8_tx_p33_7: asclin8_tx_p33_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 7, O4)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin9_rx_p14_7: asclin9_rx_p14_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 7, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin9_rx_p14_9: asclin9_rx_p14_9 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 9, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin9_rx_p20_6: asclin9_rx_p20_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 6, E)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin9_rx_p20_7: asclin9_rx_p20_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 7, F)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin9_tx_p14_7: asclin9_tx_p14_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 7, O4)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin9_tx_p20_7: asclin9_tx_p20_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 7, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin10_rx_p0_4: asclin10_rx_p0_4 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 4, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin10_rx_p0_8: asclin10_rx_p0_8 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 8, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin10_rx_p13_0: asclin10_rx_p13_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(13, 0, C)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin10_rx_p13_1: asclin10_rx_p13_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(13, 1, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin10_sclk_p13_2: asclin10_sclk_p13_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(13, 2, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin10_slso_p13_3: asclin10_slso_p13_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(13, 3, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin10_tx_p0_8: asclin10_tx_p0_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 8, O3)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin10_tx_p13_0: asclin10_tx_p13_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(13, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_rx_p10_0: asclin11_rx_p10_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 0, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin11_rx_p10_4: asclin11_rx_p10_4 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 4, B)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_rx_p21_0: asclin11_rx_p21_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 0, C)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_rx_p21_1: asclin11_rx_p21_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 1, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_rx_p21_2: asclin11_rx_p21_2 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 2, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_rx_p21_5: asclin11_rx_p21_5 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 5, F)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_sclk_p21_3: asclin11_sclk_p21_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 3, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_slso_p21_4: asclin11_slso_p21_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 4, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_tx_p10_0: asclin11_tx_p10_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 0, O2)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ asclin11_tx_p21_0: asclin11_tx_p21_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 0, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ asclin11_tx_p21_5: asclin11_tx_p21_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 5, O3)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_rx_p2_1: can00_rx_p2_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 1, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can00_rx_p20_7: can00_rx_p20_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 7, B)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_rx_p33_7: can00_rx_p33_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 7, E)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can00_rx_p33_12: can00_rx_p33_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 12, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_tx_p2_0: can00_tx_p2_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 0, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_tx_p20_8: can00_tx_p20_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 8, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_tx_p33_8: can00_tx_p33_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 8, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can00_tx_p33_13: can00_tx_p33_13 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 13, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_rx_p14_1: can01_rx_p14_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 1, B)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_rx_p15_3: can01_rx_p15_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 3, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_rx_p33_10: can01_rx_p33_10 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 10, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_tx_p14_0: can01_tx_p14_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 0, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_tx_p15_2: can01_tx_p15_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 2, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can01_tx_p33_9: can01_tx_p33_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 9, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can02_rx_p2_3: can02_rx_p2_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 3, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can02_rx_p10_2: can02_rx_p10_2 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 2, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can02_rx_p14_8: can02_rx_p14_8 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 8, D)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can02_rx_p15_1: can02_rx_p15_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(15, 1, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can02_tx_p2_2: can02_tx_p2_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 2, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can02_tx_p10_3: can02_tx_p10_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 3, O6)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can02_tx_p14_10: can02_tx_p14_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 10, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can02_tx_p15_0: can02_tx_p15_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(15, 0, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_rx_p0_3: can03_rx_p0_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 3, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can03_rx_p11_10: can03_rx_p11_10 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 10, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_rx_p20_0: can03_rx_p20_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 0, C)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_rx_p20_9: can03_rx_p20_9 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 9, E)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_rx_p32_2: can03_rx_p32_2 {
+		pinmux = <TC3XX_INPUT_PINMUX(32, 2, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can03_tx_p0_2: can03_tx_p0_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 2, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can03_tx_p11_12: can03_tx_p11_12 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(11, 12, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_tx_p20_3: can03_tx_p20_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 3, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can03_tx_p20_10: can03_tx_p20_10 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 10, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can03_tx_p32_3: can03_tx_p32_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(32, 3, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can10_rx_p0_1: can10_rx_p0_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 1, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can10_rx_p13_1: can10_rx_p13_1 {
+		pinmux = <TC3XX_INPUT_PINMUX(13, 1, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can10_rx_p14_7: can10_rx_p14_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 7, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can10_rx_p23_0: can10_rx_p23_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(23, 0, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can10_tx_p0_0: can10_tx_p0_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 0, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can10_tx_p13_0: can10_tx_p13_0 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(13, 0, O7)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can10_tx_p14_9: can10_tx_p14_9 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 9, O4)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can10_tx_p23_1: can10_tx_p23_1 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 1, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can11_rx_p0_5: can11_rx_p0_5 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 5, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can11_rx_p2_4: can11_rx_p2_4 {
+		pinmux = <TC3XX_INPUT_PINMUX(2, 4, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can11_tx_p0_4: can11_tx_p0_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(0, 4, O3)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can11_tx_p2_5: can11_tx_p2_5 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 5, O2)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can12_rx_p10_8: can12_rx_p10_8 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 8, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can12_rx_p20_6: can12_rx_p20_6 {
+		pinmux = <TC3XX_INPUT_PINMUX(20, 6, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can12_rx_p23_3: can12_rx_p23_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(23, 3, C)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can12_tx_p10_7: can12_tx_p10_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(10, 7, O6)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can12_tx_p20_7: can12_tx_p20_7 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(20, 7, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can12_tx_p23_2: can12_tx_p23_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(23, 2, O5)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can13_rx_p14_7: can13_rx_p14_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(14, 7, A)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can13_rx_p33_5: can13_rx_p33_5 {
+		pinmux = <TC3XX_INPUT_PINMUX(33, 5, B)>;
+		pin-type = <0>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ can13_tx_p14_6: can13_tx_p14_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(14, 6, O4)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ can13_tx_p33_4: can13_tx_p33_4 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(33, 4, O7)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ geth_mdc_p2_8: geth_mdc_p2_8 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(2, 8, O6)>;
+		output-enable;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ geth_mdc_p21_2: geth_mdc_p21_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(21, 2, O5)>;
+		output-enable;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_mdio_p0_0: geth_mdio_p0_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(0, 0, A)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_mdio_p21_3: geth_mdio_p21_3 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 3, D)>;
+		pin-type = <0>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rctl_p11_11: geth_rctl_p11_11 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 11, A)>;
+		pin-type = <4>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_refclk_p11_12: geth_refclk_p11_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 12, A)>;
+		pin-type = <1>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rxclk_p11_12: geth_rxclk_p11_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 12, A)>;
+		pin-type = <1>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rxd0_p11_10: geth_rxd0_p11_10 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 10, A)>;
+		pin-type = <6>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rxd1_p11_9: geth_rxd1_p11_9 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 9, A)>;
+		pin-type = <7>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rxdv_p11_11: geth_rxdv_p11_11 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 11, A)>;
+		pin-type = <4>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_rxer_p10_0: geth_rxer_p10_0 {
+		pinmux = <TC3XX_INPUT_PINMUX(10, 0, C)>;
+		pin-type = <5>;
+		pad-type = "slow";
+	};
+	/omit-if-no-ref/ geth_rxer_p21_7: geth_rxer_p21_7 {
+		pinmux = <TC3XX_INPUT_PINMUX(21, 7, B)>;
+		pin-type = <5>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_txclk_p11_12: geth_txclk_p11_12 {
+		pinmux = <TC3XX_INPUT_PINMUX(11, 12, B)>;
+		pin-type = <10>;
+		pad-type = "fast";
+	};
+	/omit-if-no-ref/ geth_txd0_p11_3: geth_txd0_p11_3 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(11, 3, O6)>;
+		output-enable;
+		output-select;
+		pad-type = "rfast";
+	};
+	/omit-if-no-ref/ geth_txd1_p11_2: geth_txd1_p11_2 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(11, 2, O6)>;
+		output-enable;
+		output-select;
+		pad-type = "rfast";
+	};
+	/omit-if-no-ref/ geth_txen_p11_6: geth_txen_p11_6 {
+		pinmux = <TC3XX_OUTPUT_PINMUX(11, 6, O6)>;
+		output-enable;
+		output-select;
+		pad-type = "rfast";
+	};
+};
diff --git a/dts/tricore/infineon/tc33x.dtsi b/dts/tricore/infineon/tc33x.dtsi
new file mode 100644
index 0000000000000..93414a22417c4
--- /dev/null
+++ b/dts/tricore/infineon/tc33x.dtsi
@@ -0,0 +1,521 @@
+/*
+ * Copyright (c) 2024 Infineon Technologies AG
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <freq.h>
+#include <skeleton.dtsi>
+#include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/interrupt-controller/tc3xx-ir.h>
+#include <infineon/tc3xx-common.dtsi>
+
+/ {
+	model = "infineon,tc33x";
+	compatible = "infineon,tc33x";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "infineon,tc162";
+			reg = <0>;
+			clocks = <&fcpu0>;
+		};
+	};
+
+	ir: interrupt_controller@F0037000 {
+		compatible = "infineon,tc-ir";
+		reg = <0xF0037000 0x10000 0xF0038000 0x10000>;
+		#interrupt-cells = <2>;
+		interrupt-controller;
+	};
+
+	flash_controller: flash_controller@A8080000 {
+		compatible = "infineon,tc3xx-flash-controller";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0xA8080000 0x100000>;
+		flash0: flash@80000000 {
+			compatible = "infineon,tc3xx-nv-flash","soc-nv-flash";
+			write-block-size = <256>;
+			reg = <0x80000000 DT_SIZE_M(2)>;
+		};
+	};
+
+	dsram0: memory@70000000 {
+		compatible = "zephyr,memory-region","mmio-sram";
+		reg = <0x70000000 DT_SIZE_K(192)>;
+		zephyr,memory-region = "DSRAM0";
+	};
+
+	psram0: memory@70100000 {
+		compatible = "zephyr,memory-region","mmio-sram";
+		reg = <0x70100000 DT_SIZE_K(8)>;
+		zephyr,memory-region = "PSRAM0";
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupt-parent = <&ir>;
+		compatible = "simple-bus";
+		ranges;
+
+		stm0: timer@f0001000 {
+			compatible = "infineon,tc3xx-stm";
+			reg = <0xF0001000 256>;
+			clocks = <&fstm>;
+			interrupts = <192 1>;
+		};
+
+		pinctrl: pinctrl@f003a000 {
+			compatible = "infineon,tc3xx-pinctrl";
+			reg = <0xF003A000 0x100>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			p00: gpio@f003a000 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003A000 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p02: gpio@f003a200 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003A200 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p10: gpio@f003aa00 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003AA00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p11: gpio@f003ab00 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003AB00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p13: gpio@f003ad00 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003AD00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p14: gpio@f003ae00 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003AE00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p15: gpio@f003af00 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003AF00 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p20: gpio@f003b400 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003B400 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p21: gpio@f003b500 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003B500 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p22: gpio@f003b600 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003B600 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p23: gpio@f003b700 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003B700 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p32: gpio@f003c000 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003C000 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p33: gpio@f003c100 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003C100 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				#status = "disabled";
+			};
+			p34: gpio@f003c200 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003C200 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+			p40: gpio@f003c800 {
+				compatible = "infineon,tc3xx-gpio";
+				reg = <0xF003C800 0x100>;
+				gpio-controller;
+				#gpio-cells = <2>;
+				status = "disabled";
+			};
+		};
+
+		asclin0: asclin@f0000600 {
+			reg = <0xF0000600 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart0: uart@f0000600 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000600 256>;
+				interrupts = <20 2>, <21 3>, <22 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin1: asclin@f0000700 {
+			reg = <0xF0000700 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart1: uart@f0000700 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000700 256>;
+				interrupts = <23 2>, <24 3>, <25 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin2: asclin@f0000800 {
+			reg = <0xF0000800 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart2: uart@f0000800 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000800 256>;
+				interrupts = <26 2>, <27 3>, <28 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin3: asclin@f0000900 {
+			reg = <0xF0000900 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart3: uart@f0000900 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000900 256>;
+				interrupts = <29 2>, <30 3>, <31 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+
+		asclin4: asclin@f0000a00 {
+			reg = <0xF0000A00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart4: uart@f0000a00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000A00 256>;
+				interrupts = <32 2>, <33 3>, <34 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin5: asclin@f0000b00 {
+			reg = <0xF0000B00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart5: uart@f0000b00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000B00 256>;
+				interrupts = <35 2>, <36 3>, <37 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin6: asclin@f0000c00 {
+			reg = <0xF0000C00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart6: uart@f0000c00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000C00 256>;
+				interrupts = <38 2>, <39 3>, <40 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin7: asclin@f0000d00 {
+			reg = <0xF0000D00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart7: uart@f0000d00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000D00 256>;
+				interrupts = <41 2>, <42 3>, <43 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin8: asclin@f0000e00 {
+			reg = <0xF0000E00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart8: uart@f0000e00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000E00 256>;
+				interrupts = <44 2>, <45 3>, <46 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin9: asclin@f0000f00 {
+			reg = <0xF0000F00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart9: uart@f0000f00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF0000F00 256>;
+				interrupts = <47 2>, <48 3>, <49 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin10: asclin@f02c0a00 {
+			reg = <0xF02C0A00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart10: uart@f02c0a00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF02C0A00 256>;
+				interrupts = <50 2>, <51 3>, <52 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		asclin11: asclin@f02c0b00 {
+			reg = <0xF02C0B00 256>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			uart11: uart@f02c0b00 {
+				compatible = "infineon,asclin-uart";
+				reg = <0xF02C0B00 256>;
+				interrupts = <53 2>, <54 3>, <55 4>;
+				interrupt-names = "tx", "rx", "err";
+				clocks = <&fasclinf>, <&fasclins>;
+				status = "disabled";
+			};
+		};
+
+		geth@f001d000 {
+			reg = <0xF001D000 0x2100>;
+			compatible = "infineon,tc3xx-geth";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&fspb>, <&fgeth>, <&fgeth>;
+			clock-names = "csr", "app", "ptp";
+
+			mdio0: mdio@f001d200 {
+				compatible = "snps,dwc-eth-qos-mdio";
+				reg = <0xF001D200 0x8>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			ptp_clock0: ptp@f001db00 {
+				compatible = "snps,dwc-eth-qos-ptp-clock";
+				reg = <0xF001DB00 0x20>;
+			};
+
+			eth0: geth@f001d000 {
+				compatible = "snps,designware-ethernet";
+				reg = <0xF001D000 0x2000>;
+				interrupts = <0x160 10>, <0x161 11>, <0x162 12>, <0x163 13>, <0x164 14>, <0x165 15>, <0x166 16>, <0x167 17>, <0x168 18>, <0x169 19>;
+				interrupt-names = "common", "pps", "tx0", "tx1", "tx2", "tx3", "rx0", "rx1", "rx2", "rx3";
+				ptp-clock = <&ptp_clock0>;
+			};
+		};
+
+		mcmcan0: mcmcan0@f0200000 {
+			compatible = "infineon,mcmcan";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0xF0200000 0x9000>;
+			clocks = <&fmcan>, <&fmcanh>;
+			status = "disabled";
+
+			can00: can@f0208200 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0208200 0x200>, <0xF0200000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN0INT0_INT 10>, <TC3XX_IR_CAN0INT1_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can01: can@f0208600 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0208600 0x200>, <0xF0200000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN0INT2_INT 10>, <TC3XX_IR_CAN0INT3_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can02: can@f0208a00 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0208A00 0x200>, <0xF0200000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN0INT4_INT 10>, <TC3XX_IR_CAN0INT5_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can03: can@f0208e00 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0208E00 0x200>, <0xF0200000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN0INT6_INT 10>, <TC3XX_IR_CAN0INT7_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+		};
+
+		mcmcan1: mcmcan1@f0210000 {
+			compatible = "infineon,mcmcan";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0xF0210000 0x9000>;
+			clocks = <&fmcan>, <&fmcanh>;
+			status = "disabled";
+
+			can10: can@f0218200 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0218200 0x200>, <0xF0210000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN1INT0_INT 10>, <TC3XX_IR_CAN1INT1_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can11: can@f0218600 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0218600 0x200>, <0xF0210000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN1INT2_INT 10>, <TC3XX_IR_CAN1INT3_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can12: can@f0218a00 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0218A00 0x200>, <0xF0210000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN1INT4_INT 10>, <TC3XX_IR_CAN1INT5_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+			can13: can@f0218e00 {
+				compatible = "infineon,mcmcan-node";
+				reg = <0xF0218E00 0x200>, <0xF0210000 0x8000>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <TC3XX_IR_CAN1INT6_INT 10>, <TC3XX_IR_CAN1INT7_INT 11>;
+				interrupt-names = "line0", "line1";
+				bosch,mram-cfg = <0x0 32 32 32 32 0 16 16>;
+				sample-point = <875>;
+				sample-point-data = <875>;
+				bus-speed = <500000>;
+				bus-speed-data = <2000000>;
+				status = "disabled";
+			};
+		};
+	};
+};
\ No newline at end of file
diff --git a/soc/infineon/infineon_aurix/soc.yml b/soc/infineon/infineon_aurix/soc.yml
index 8cc240132bb26..18779b422fbe8 100644
--- a/soc/infineon/infineon_aurix/soc.yml
+++ b/soc/infineon/infineon_aurix/soc.yml
@@ -13,3 +13,6 @@ family:
       - name: tc162
       - name: tc162
       - name: tc162
+    - name: tc337lp
+      cpuclusters:
+      - name: tc162
diff --git a/soc/infineon/infineon_aurix/tc3xx/Kconfig.soc b/soc/infineon/infineon_aurix/tc3xx/Kconfig.soc
index e2bb0e89b5ab5..e0542f5270c7b 100644
--- a/soc/infineon/infineon_aurix/tc3xx/Kconfig.soc
+++ b/soc/infineon/infineon_aurix/tc3xx/Kconfig.soc
@@ -19,6 +19,11 @@ config SOC_TC377TX
 	bool
 	select SOC_SERIES_TC3XX
 
+config SOC_TC337LP
+	bool
+	select SOC_SERIES_TC3XX
+
 config SOC
 	default "tc375tp" if SOC_TC375TP
-	default "tc375tx" if SOC_TC377TX
\ No newline at end of file
+	default "tc375tx" if SOC_TC377TX
+	default "tc337lp" if SOC_TC337LP
\ No newline at end of file