SPI on PB3, 4, 5

[jngls]

Hi, I noticed that there's an alternate option for SPI1 using PB3, 4, 5 on the bluepill pinout:

I'm wondering if I can use that somehow instead of PA5, 6, 7.

I'd like to keep SPI2 free for other stuff, and move SPI1 to GPIOB if possible - so that I have more analog ins.

I attempted this in code and it seems the pin traits are not correct:

    // Error: the following trait bounds were not satisfied: `Debugger: stm32f1xx_hal::gpio::Active`
    let sck = gpiob.pb3.into_alternate_push_pull(&mut gpiob.crl);
    
    let miso = gpiob.pb4;
    let mosi = gpiob.pb5.into_alternate_push_pull(&mut gpiob.crl);
    
    // Error: the following trait bounds were not satisfied: `Debugger: stm32f1xx_hal::gpio::Active`
    let cs = gpioa.pa15.into_push_pull_output(&mut gpioa.crl);

    // This works
    //    let sck = gpioa.pa5.into_alternate_push_pull(&mut gpioa.crl);
    //    let miso = gpioa.pa6;
    //    let mosi = gpioa.pa7.into_alternate_push_pull(&mut gpioa.crl);
    //    let cs = gpioa.pa4.into_push_pull_output(&mut gpioa.crl);

    let spi = Spi::spi1(
        dp.SPI1,
        (sck, miso, mosi),
        &mut afio.mapr,
        MODE,
        1.MHz(),
        clocks,
    );

Is this kind of alternate SPI layout possible?

I've noticed code for Spi1Remap in https://github.com/stm32-rs/stm32f1xx-hal/blob/master/src/spi.rs, but I can't work out how to use it...

[EDIT - Seems like Spi1Remap should be an inherent trait of PB3, 4, 5 when configured correctly, but I can't get the pins configured that way 😕]

[jngls]

Got it working with the disable_jtag method:

    let (pa15, pb3, pb4) = afio.mapr.disable_jtag(gpioa.pa15, gpiob.pb3, gpiob.pb4);

    let sck = pb3.into_alternate_push_pull(&mut gpiob.crl);
    let miso = pb4.into_floating_input(&mut gpiob.crl);
    let mosi = gpiob.pb5.into_alternate_push_pull(&mut gpiob.crl);
    let cs = pa15.into_push_pull_output(&mut gpioa.crh);