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soheilshahrouzsoheilshahrouz
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Merge remote-tracking branch 'origin/master' into temp_3d_sg and resolve conflicts
2 parents 3d00065 + 6274fd1 commit c39e001

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64 files changed

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‎libs/libarchfpga/src/echo_arch.cpp‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -123,25 +123,25 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) {
123123
fprintf(Echo, "\tChannel Width Distribution:\n");
124124

125125
switch (arch->Chans.chan_x_dist.type) {
126-
case (UNIFORM):
126+
case e_stat::UNIFORM:
127127
fprintf(Echo, "\t\tx: type uniform peak %e\n",
128128
arch->Chans.chan_x_dist.peak);
129129
break;
130-
case (GAUSSIAN):
130+
case e_stat::GAUSSIAN:
131131
fprintf(Echo,
132132
"\t\tx: type gaussian peak %e \
133133
width %e Xpeak %e dc %e\n",
134134
arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width,
135135
arch->Chans.chan_x_dist.xpeak, arch->Chans.chan_x_dist.dc);
136136
break;
137-
case (PULSE):
137+
case e_stat::PULSE:
138138
fprintf(Echo,
139139
"\t\tx: type pulse peak %e \
140140
width %e Xpeak %e dc %e\n",
141141
arch->Chans.chan_x_dist.peak, arch->Chans.chan_x_dist.width,
142142
arch->Chans.chan_x_dist.xpeak, arch->Chans.chan_x_dist.dc);
143143
break;
144-
case (DELTA):
144+
case e_stat::DELTA:
145145
fprintf(Echo,
146146
"\t\tx: distr dleta peak %e \
147147
Xpeak %e dc %e\n",
@@ -154,25 +154,25 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) {
154154
}
155155

156156
switch (arch->Chans.chan_y_dist.type) {
157-
case (UNIFORM):
157+
case e_stat::UNIFORM:
158158
fprintf(Echo, "\t\ty: type uniform peak %e\n",
159159
arch->Chans.chan_y_dist.peak);
160160
break;
161-
case (GAUSSIAN):
161+
case e_stat::GAUSSIAN:
162162
fprintf(Echo,
163163
"\t\ty: type gaussian peak %e \
164164
width %e Xpeak %e dc %e\n",
165165
arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width,
166166
arch->Chans.chan_y_dist.xpeak, arch->Chans.chan_y_dist.dc);
167167
break;
168-
case (PULSE):
168+
case e_stat::PULSE:
169169
fprintf(Echo,
170170
"\t\ty: type pulse peak %e \
171171
width %e Xpeak %e dc %e\n",
172172
arch->Chans.chan_y_dist.peak, arch->Chans.chan_y_dist.width,
173173
arch->Chans.chan_y_dist.xpeak, arch->Chans.chan_y_dist.dc);
174174
break;
175-
case (DELTA):
175+
case e_stat::DELTA:
176176
fprintf(Echo,
177177
"\t\ty: distr dleta peak %e \
178178
Xpeak %e dc %e\n",
@@ -217,16 +217,16 @@ void PrintArchInfo(FILE* Echo, const t_arch* arch) {
217217
//It always consists of 10 alphanumeric digits, a decimal
218218
//and a sign
219219
for (int i = 0; i < (int)arch->switches.size(); i++) {
220-
if (arch->switches[i].type() == SwitchType::MUX) {
220+
if (arch->switches[i].type() == e_switch_type::MUX) {
221221
fprintf(Echo, "\tSwitch[%d]: name %s type mux\n", i + 1, arch->switches[i].name.c_str());
222-
} else if (arch->switches[i].type() == SwitchType::TRISTATE) {
222+
} else if (arch->switches[i].type() == e_switch_type::TRISTATE) {
223223
fprintf(Echo, "\tSwitch[%d]: name %s type tristate\n", i + 1, arch->switches[i].name.c_str());
224-
} else if (arch->switches[i].type() == SwitchType::SHORT) {
224+
} else if (arch->switches[i].type() == e_switch_type::SHORT) {
225225
fprintf(Echo, "\tSwitch[%d]: name %s type short\n", i + 1, arch->switches[i].name.c_str());
226-
} else if (arch->switches[i].type() == SwitchType::BUFFER) {
226+
} else if (arch->switches[i].type() == e_switch_type::BUFFER) {
227227
fprintf(Echo, "\tSwitch[%d]: name %s type buffer\n", i + 1, arch->switches[i].name.c_str());
228228
} else {
229-
VTR_ASSERT(arch->switches[i].type() == SwitchType::PASS_GATE);
229+
VTR_ASSERT(arch->switches[i].type() == e_switch_type::PASS_GATE);
230230
fprintf(Echo, "\tSwitch[%d]: name %s type pass_gate\n", i + 1, arch->switches[i].name.c_str());
231231
}
232232
fprintf(Echo, "\t\t\t\tR %e Cin %e Cout %e\n", arch->switches[i].R,

‎libs/libarchfpga/src/physical_types.cpp‎

Lines changed: 14 additions & 78 deletions
Original file line numberDiff line numberDiff line change
@@ -2,22 +2,14 @@
22
#include "arch_types.h"
33
#include "vtr_math.h"
44
#include "vtr_util.h"
5-
#include "vtr_log.h"
65

76
#include "arch_util.h"
87

9-
static bool switch_type_is_buffered(SwitchType type);
10-
static bool switch_type_is_configurable(SwitchType type);
11-
static e_directionality switch_type_directionality(SwitchType type);
12-
13-
//Ensure the constant has external linkage to avoid linking errors
14-
constexpr int t_arch_switch_inf::UNDEFINED_FANIN;
15-
168
/*
179
* t_arch_switch_inf
1810
*/
1911

20-
SwitchType t_arch_switch_inf::type() const {
12+
e_switch_type t_arch_switch_inf::type() const {
2113
return type_;
2214
}
2315

@@ -52,88 +44,32 @@ void t_arch_switch_inf::set_Tdel(int fanin, float delay) {
5244
Tdel_map_[fanin] = delay;
5345
}
5446

55-
void t_arch_switch_inf::set_type(SwitchType type_val) {
56-
type_ = type_val;
57-
}
58-
59-
/*
60-
* t_rr_switch_inf
61-
*/
62-
63-
SwitchType t_rr_switch_inf::type() const {
64-
return type_;
65-
}
66-
67-
bool t_rr_switch_inf::buffered() const {
68-
return switch_type_is_buffered(type());
69-
}
70-
71-
bool t_rr_switch_inf::configurable() const {
72-
return switch_type_is_configurable(type());
73-
}
74-
75-
bool t_rr_switch_inf::operator==(const t_rr_switch_inf& other) const {
76-
return R == other.R
77-
&& Cin == other.Cin
78-
&& Cout == other.Cout
79-
&& Cinternal == other.Cinternal
80-
&& Tdel == other.Tdel
81-
&& mux_trans_size == other.mux_trans_size
82-
&& buf_size == other.buf_size
83-
&& power_buffer_type == other.power_buffer_type
84-
&& power_buffer_size == other.power_buffer_size
85-
&& intra_tile == other.intra_tile
86-
&& type() == other.type();
87-
}
88-
89-
std::size_t t_rr_switch_inf::Hasher::operator()(const t_rr_switch_inf& s) const {
90-
std::size_t hash_val = 0;
91-
92-
auto hash_combine = [&hash_val](auto&& val) {
93-
hash_val ^= std::hash<std::decay_t<decltype(val)>>{}(val) + 0x9e3779b9 + (hash_val << 6) + (hash_val >> 2);
94-
};
95-
96-
hash_combine(s.R);
97-
hash_combine(s.Cin);
98-
hash_combine(s.Cout);
99-
hash_combine(s.Cinternal);
100-
hash_combine(s.Tdel);
101-
hash_combine(s.mux_trans_size);
102-
hash_combine(s.buf_size);
103-
hash_combine(static_cast<int>(s.power_buffer_type));
104-
hash_combine(s.power_buffer_size);
105-
hash_combine(s.intra_tile);
106-
hash_combine(static_cast<int>(s.type()));
107-
108-
return hash_val;
109-
}
110-
111-
void t_rr_switch_inf::set_type(SwitchType type_val) {
47+
void t_arch_switch_inf::set_type(e_switch_type type_val) {
11248
type_ = type_val;
11349
}
11450

115-
static bool switch_type_is_buffered(SwitchType type) {
51+
bool switch_type_is_buffered(e_switch_type type) {
11652
//Muxes and Tristates isolate their input and output into
11753
//separate DC connected sub-circuits
118-
return type == SwitchType::MUX
119-
|| type == SwitchType::TRISTATE
120-
|| type == SwitchType::BUFFER;
54+
return type == e_switch_type::MUX
55+
|| type == e_switch_type::TRISTATE
56+
|| type == e_switch_type::BUFFER;
12157
}
12258

123-
static bool switch_type_is_configurable(SwitchType type) {
59+
bool switch_type_is_configurable(e_switch_type type) {
12460
//Shorts and buffers are non-configurable
125-
return !(type == SwitchType::SHORT
126-
|| type == SwitchType::BUFFER);
61+
return !(type == e_switch_type::SHORT
62+
|| type == e_switch_type::BUFFER);
12763
}
12864

129-
static e_directionality switch_type_directionality(SwitchType type) {
130-
if (type == SwitchType::SHORT || type == SwitchType::PASS_GATE) {
65+
e_directionality switch_type_directionality(e_switch_type type) {
66+
if (type == e_switch_type::SHORT || type == e_switch_type::PASS_GATE) {
13167
//Shorts and pass gates can conduct in either direction
13268
return e_directionality::BI_DIRECTIONAL;
13369
} else {
134-
VTR_ASSERT_SAFE(type == SwitchType::MUX
135-
|| type == SwitchType::TRISTATE
136-
|| type == SwitchType::BUFFER);
70+
VTR_ASSERT_SAFE(type == e_switch_type::MUX
71+
|| type == e_switch_type::TRISTATE
72+
|| type == e_switch_type::BUFFER);
13773
//Buffered switches can only drive in one direction
13874
return e_directionality::UNI_DIRECTIONAL;
13975
}

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