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d-philpotd-philpot
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dts: add I2C nodes for MSPM0
Adds devicetree entries for different I2C peripherals on MSPM0 devices. Signed-off-by: Dylan Philpot <[email protected]>
1 parent 95061cf commit 09a89d2

12 files changed

+287
-1
lines changed

‎dts/arm/ti/mspm0/g/mspm0g110x.dtsi‎

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11
/* SPDX-License-Identifier: Apache-2.0 */
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#include <ti/mspm0/g/mspm0g.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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soc {
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/g/mspm0g150x.dtsi‎

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/* SPDX-License-Identifier: Apache-2.0 */
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#include <ti/mspm0/g/mspm0g.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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soc {
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/g/mspm0g310x.dtsi‎

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/* SPDX-License-Identifier: Apache-2.0 */
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#include <ti/mspm0/g/mspm0g.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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soc {
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/g/mspm0g350x.dtsi‎

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/* SPDX-License-Identifier: Apache-2.0 */
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#include <ti/mspm0/g/mspm0g.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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soc {
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/g/mspm0gx51x.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -1,8 +1,9 @@
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/* SPDX-License-Identifier: Apache-2.0 */
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#include <ti/mspm0/g/mspm0g.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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5-
/{
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/ {
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soc {
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gpioc: gpio@400a4000 {
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compatible = "ti,mspm0-gpio";
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status = "disabled";
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};
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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i2c2: i2c@400f4000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f4000 0x2000>;
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interrupts = <26 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/l/mspm0l110x.dtsi‎

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@@ -13,5 +13,16 @@
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(4)>;
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/l/mspm0l111x.dtsi‎

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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(16)>;
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f0000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/l/mspm0l13x3.dtsi‎

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flash0: serial-flash@0 {
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reg = <0x0 DT_SIZE_K(8)>;
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/l/mspm0l13x4.dtsi‎

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flash0: serial-flash@0 {
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reg = <0x0 DT_SIZE_K(16)>;
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <25 0>;
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status = "disabled";
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};
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};
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};

‎dts/arm/ti/mspm0/l/mspm0l13x5.dtsi‎

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flash0: serial-flash@0 {
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reg = <0x0 DT_SIZE_K(32)>;
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};
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i2c0: i2c@400f0000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
24+
clock-frequency = <I2C_BITRATE_STANDARD>;
25+
#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
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interrupts = <24 0>;
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status = "disabled";
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};
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i2c1: i2c@400f2000 {
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compatible = "ti,mspm0-i2c";
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clocks = <&ckm MSPM0_CLOCK_ULPCLK>;
35+
clock-frequency = <I2C_BITRATE_STANDARD>;
36+
#address-cells = <1>;
37+
#size-cells = <0>;
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reg = <0x400f2000 0x2000>;
39+
interrupts = <25 0>;
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status = "disabled";
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};
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};
2143
};

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