Merge pull request #13723 from boraozgen/feature/f412xg-crash-ram

0xc0170 · web-flow · commit 2d01a4412d8c · 2020-10-16T09:10:55.000+01:00
Add crash RAM to STM32F412xG
diff --git a/platform/mbed_lib.json b/platform/mbed_lib.json
@@ -220,6 +220,10 @@
             "crash-capture-enabled": true,
             "fatal-error-auto-reboot-enabled": true
         },
+        "NUCLEO_F412ZG": {
+            "crash-capture-enabled": true,
+            "fatal-error-auto-reboot-enabled": true
+        },
         "DISCO_F413ZH": {
             "crash-capture-enabled": true,
             "fatal-error-auto-reboot-enabled": true
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_ARM/stm32f411re.sct
@@ -5,7 +5,7 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2014-2020 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
 ;* All rights reserved.
 ;*
 ;* This software component is licensed by ST under BSD 3-Clause license,
@@ -60,7 +60,7 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
    .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))  {  ; Heap growing up
   }
 
   ARM_LIB_STACK  (MBED_RAM_START + MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE  { ; Stack region growing down
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TOOLCHAIN_IAR/stm32f411xe.icf
@@ -18,46 +18,47 @@
 
 /* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
 
-if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = MBED_ROM_START; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; }
-
-/* [ROM = 512kb = 0x80000] */
-define symbol __intvec_start__     = MBED_APP_START;
-define symbol __region_ROM_start__ = MBED_APP_START;
-define symbol __region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
-
-/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
-define symbol __NVIC_start__          = 0x20000000;
-define symbol __NVIC_end__            = 0x20000197; /* Aligned on 8 bytes */
-define symbol __region_CRASH_DATA_RAM_start__  = 0x20000198;
-define symbol __region_CRASH_DATA_RAM_end__  = 0x20000297;
-define symbol __region_RAM_start__    = 0x20000298;
-define symbol __region_RAM_end__      = 0x2001FFFF;
-
-/* Memory regions */
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
-define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
-define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
+define symbol VECTORS     = 102; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
+define symbol HEAP_SIZE   = 0xa000;
+
+/* Common - Do not change */
+
+if (!isdefinedsymbol(MBED_APP_START)) {
+    define symbol MBED_APP_START = MBED_ROM_START;
+}
 
-/* Define Crash Data Symbols */
-define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
-define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
+if (!isdefinedsymbol(MBED_APP_SIZE)) {
+    define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
+}
 
-/* Stack and Heap */
 if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
+    /* This value is normally defined by the tools
+        to 0x1000 for bare metal and 0x400 for RTOS */
     define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
 }
-define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
-define symbol __size_heap__   = 0x15000;
-define block CSTACK    with alignment = 8, size = __size_cstack__   { };
-define block HEAP      with alignment = 8, size = __size_heap__     { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
 
-initialize by copy with packing = zeros { readwrite };
+/* Round up VECTORS_SIZE to 8 bytes */
+define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
+
+define symbol CRASH_DATA_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol CRASH_DATA_SIZE  = 0x100;
+define exported symbol __CRASH_DATA_RAM_START__ = CRASH_DATA_START;
+
+define symbol RAM_REGION_START = CRASH_DATA_START + CRASH_DATA_SIZE;
+define symbol RAM_REGION_SIZE  = MBED_RAM_SIZE - VECTORS_SIZE - CRASH_DATA_SIZE;
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
+define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
+
+define block CSTACK    with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE   { };
+define block HEAP      with alignment = 8, size = HEAP_SIZE     { };
+
+initialize by copy { readwrite };
 do not initialize  { section .noinit };
 
-place at address mem:__intvec_start__ { readonly section .intvec };
+place at address mem: MBED_APP_START { readonly section .intvec };
 
 place in ROM_region   { readonly };
-place in RAM_region   { readwrite, block STACKHEAP };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_ARM/stm32f412xg.sct
@@ -37,6 +37,14 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
+#define MBED_CRASH_REPORT_RAM_SIZE  0x100
+
+#define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+
+
+#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
+
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
 
   ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {
@@ -45,11 +53,14 @@ LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
     .ANY (+RO)
   }
 
-  RW_IRAM1  (MBED_RAM_START + VECTORS_SIZE)  {  ; RW data
-    .ANY (+RW +ZI)
+  RW_m_crash_data  (MBED_RAM_START + VECTORS_SIZE)  EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
+  }
+
+  RW_IRAM1  MBED_IRAM1_START  MBED_IRAM1_SIZE  {  ; RW data
+   .ANY (+RW +ZI)
   }
 
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))  { ; Heap growing up
+  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16))  {  ; Heap growing up
   }
 
   ARM_LIB_STACK  (MBED_RAM_START + MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE  { ; Stack region growing down
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_GCC_ARM/STM32F412xG.ld
@@ -35,6 +35,8 @@
 /* Round up VECTORS_SIZE to 8 bytes */
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
+M_CRASH_DATA_RAM_SIZE = 0x100;
+
 MEMORY
 {
     FLASH (rx)   : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
@@ -114,6 +116,18 @@ SECTIONS
     __etext = .;
     _sidata = .;
     
+    .crash_data_ram :
+    {
+        . = ALIGN(8);
+        __CRASH_DATA_RAM__ = .;
+        __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
+        KEEP(*(.keep.crash_data_ram))
+        *(.m_crash_data_ram)     /* This is a user defined section */
+        . += M_CRASH_DATA_RAM_SIZE;
+        . = ALIGN(8);
+        __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
+    } > RAM    
+
     .data : AT (__etext)
     {
         __data_start__ = .;
diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TOOLCHAIN_IAR/stm32f412xx.icf
@@ -32,15 +32,20 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
 }
 
 if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
-    /* This value is normally defined by the tools 
+    /* This value is normally defined by the tools
         to 0x1000 for bare metal and 0x400 for RTOS */
     define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
 }
 
 /* Round up VECTORS_SIZE to 8 bytes */
 define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
-define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
-define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
+
+define symbol CRASH_DATA_START = MBED_RAM_START + VECTORS_SIZE;
+define symbol CRASH_DATA_SIZE  = 0x100;
+define exported symbol __CRASH_DATA_RAM_START__ = CRASH_DATA_START;
+
+define symbol RAM_REGION_START = CRASH_DATA_START + CRASH_DATA_SIZE;
+define symbol RAM_REGION_SIZE  = MBED_RAM_SIZE - VECTORS_SIZE - CRASH_DATA_SIZE;
 
 define memory mem with size = 4G;
 define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
