Add define for FPU_EXCEPTION_MASK

pan- · web-flow · commit 501a00b1ac70 · 2016-10-24T14:15:34.000+01:00
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c b/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c
@@ -23,6 +23,8 @@
 // In this case, bits which are equal to 0 are the bits reserved in this register
 #define SCB_ICSR_RESERVED_BITS_MASK     0x9E43F03F
 
+#define FPU_EXCEPTION_MASK 0x0000009F
+
 void sleep(void)
 {
     // ensure debug is disconnected if semihost is enabled....

Original file line number	Diff line number	Diff line change
`@@ -23,6 +23,8 @@`
`23`	`23`	`// In this case, bits which are equal to 0 are the bits reserved in this register`
`24`	`24`	`#define SCB_ICSR_RESERVED_BITS_MASK 0x9E43F03F`
`25`	`25`
	`26`	`+#define FPU_EXCEPTION_MASK 0x0000009F`
	`27`	`+`
`26`	`28`	`void sleep(void)`
`27`	`29`	`{`
`28`	`30`	`// ensure debug is disconnected if semihost is enabled....`