Merge pull request #12978 from vmedcy/pr-dev/pdl-1.5.2

Update psoc6pdl to v1.5.2

Author: 0xc0170

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/RELEASE.md

@@ -1,28 +1,34 @@
-# PSoC 6 Peripheral Driver Library v1.5.1
+# PSoC 6 Peripheral Driver Library v1.5.2
 
-Please refer to the [README.md](./README.md) and the [PDL API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html) for a complete description of the Peripheral Driver Library.
+Please refer to the [README.md](./README.md) and the
+[PDL API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html)
+for a complete description of the Peripheral Driver Library.
 
-### New Features
+## New Features
 
-* New ECO calculation algorithm
+* No new features
 
-### Updated Personalities
+## Updated Personalities
 
-* ECO 2.0 - added new parameter C0; narrowed the frequency range to 16..35 MHz; updated the calculation algorithm per ECO Trimming section of the device TRM.
+* WiFi - Fix build warning in the generated code. Minor parameter name updates.
 
-### Updated Drivers
+## Updated Drivers
 
-* [SysClk 2.0](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sysclk.html)
+* [SD Host 1.50](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__sd__host.html)
+* [CTB 1.10.2](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__ctb.html)
+* [SysLib 2.50.3](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syslib.html)
 
-### Known Issues
+## Known Issues
 
-None
+See the Known Issues section of
+[SysLib](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__syslib.html)
+driver.
 
-### Defect Fixes
+## Defect Fixes
 
 See the Changelog section of each Driver in the [PDL API Reference](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/modules.html) for all fixes and updates.
 
-### Supported Software and Tools
+## Supported Software and Tools
 
 This version of PDL was validated for compatibility with the following Software and Tools:
 
@@ -36,7 +42,7 @@ This version of PDL was validated for compatibility with the following Software
 | ARM Compiler 6                                                                | 6.13         |
 | FreeRTOS                                                                      | 10.0.1       |
 
-### More information
+## More information
 
 * [Peripheral Driver Library README.md](./README.md)
 * [Peripheral Driver Library API Reference Manual](https://cypresssemiconductorco.github.io/psoc6pdl/pdl_api_reference_manual/html/index.html)
@@ -46,6 +52,6 @@ This version of PDL was validated for compatibility with the following Software
 * [PSoC 6 Technical Reference Manuals](https://www.cypress.com/search/all/PSoC%206%20Technical%20Reference%20Manual?f%5b0%5d=meta_type%3Atechnical_documents&f%5b1%5d=resource_meta_type%3A583)
 * [PSoC 6 MCU Datasheets](https://www.cypress.com/search/all?f%5b0%5d=meta_type%3Atechnical_documents&f%5b1%5d=resource_meta_type%3A575&f%5b2%5d=field_related_products%3A114026)
 * [Cypress Semiconductor](http://www.cypress.com)
-  
+
 ---
 © Cypress Semiconductor Corporation, 2020.

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/devices/include/psoc6a256k.h

@@ -1,12 +1,12 @@
 /***************************************************************************//**
 * \file cy_ctb.h
-* \version 1.10.1
+* \version 1.10.2
 *
 * Header file for the CTB driver
 *
 ********************************************************************************
 * \copyright
-* Copyright 2017-2019 Cypress Semiconductor Corporation
+* Copyright 2017-2020 Cypress Semiconductor Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
@@ -287,6 +287,12 @@
 * <table class="doxtable">
 *   <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
 *   <tr>
+*     <td>1.10.2</td>
+*     <td>The \ref Cy_CTB_Init function description is expanded with a
+*         clarification note.</td>
+*     <td>Documentation enhancement based on a usability feedback.</td>
+*   </tr>
+*   <tr>
 *     <td>1.10.1</td>
 *     <td>Added header guard CY_IP_MXS40PASS to the source file.</td>
 *     <td>To enable the PDL compilation with wounded out IP blocks.</td>

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_ctb.h

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy_syslib.h
-* \version 2.50.2
+* \version 2.50.3
 *
 * Provides an API declaration of the SysLib driver.
 *
@@ -28,9 +28,9 @@
 * The system libraries provide APIs that can be called in the user application
 * to handle the timing, logical checking or register.
 *
-* The functions and other declarations used in this driver are in cy_syslib.h. 
-* You can include cy_pdl.h (ModusToolbox only) to get access to all functions 
-* and declarations in the PDL. 
+* The functions and other declarations used in this driver are in cy_syslib.h.
+* You can include cy_pdl.h (ModusToolbox only) to get access to all functions
+* and declarations in the PDL.
 *
 * The SysLib driver contains a set of different system functions. These functions
 * can be called in the application routine. Major features of the system library:
@@ -62,7 +62,7 @@
 * name and line number of the ASSERT into global variables, cy_assertFileName
 * and cy_assertLine . It then calls the Cy_SysLib_Halt() function.
 * \note Firmware can redefine the Cy_SysLib_AssertFailed() function for custom processing.
-* 
+*
 * The PDL source code uses this assert mechanism extensively. It is recommended
 * that you enable asserts when debugging firmware. \n
 * <b> Assertion Classes and Levels </b> <br />
@@ -89,15 +89,15 @@
 * </table>
 * Firmware defines which ASSERT class is enabled by defining CY_ASSERT_LEVEL.
 * This is a compiler command line argument, similar to how the DEBUG / NDEBUG
-* macro is passed. \n 
+* macro is passed. \n
 * Enabling any class also enables any lower-numbered class.
 * CY_ASSERT_CLASS_3 is the default level, and it enables asserts for all three
 * classes. The following example shows the command-line option to enable all
 * the assert levels:
 * \code -D CY_ASSERT_LEVEL=CY_ASSERT_CLASS_3 \endcode
 * \note The use of special characters, such as spaces, parenthesis, etc. must
-* be protected with quotes. 
-* 
+* be protected with quotes.
+*
 * After CY_ASSERT_LEVEL is defined, firmware can use
 * one of the three level macros to make an assertion. For example, if the
 * parameter can vary between devices, firmware uses the L1 macro.
@@ -135,19 +135,38 @@
 *   </tr>
 * </table>
 *
+* \section group_syslib_errata Known Issues
+*
+* <table class="doxtable">
+*   <tr><th>Issue</th><th>Workaround</th></tr>
+*   <tr>
+*     <td>The function malloc() does not return an error when the allocation
+*         size is bigger than the heap size.
+*     </td>
+*     <td>PDL does not implement the _sbrk function. The user needs to add
+*         custom _sbrk function.
+*     </td>
+*   </tr>
+* </table>
+*
 * \section group_syslib_changelog Changelog
 * <table class="doxtable">
 *   <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
 *   <tr>
+*     <td>2.50.3</td>
+*     <td>Add section Known Issues
+*     <td>Documentation update and clarification.</td>
+*   </tr>
+*   <tr>
 *     <td>2.50.1</td>
 *     <td>Used the core library defines for the message codes forming.
 *     <td>Improve PDL code base.</td>
 *   </tr>
 *   <tr>
 *     <td>2.50</td>
-*     <td>Moved following macros to the core library: 
-*         CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32, 
-*         CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16, 
+*     <td>Moved following macros to the core library:
+*         CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32,
+*         CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16,
 *         CY_GET_REG24,CY_SET_REG24,CY_GET_REG32,CY_SET_REG32,_CLR_SET_FLD32U,
 *         CY_REG32_CLR_SET,_CLR_SET_FLD16U,CY_REG16_CLR_SET,_CLR_SET_FLD8U,
 *         CY_REG8_CLR_SET,_BOOL2FLD,_FLD2BOOL,CY_SYSLIB_DIV_ROUND,
@@ -204,7 +223,7 @@
 *   <tr>
 *     <td>Added register access layer. Use register access macros instead
 *         of direct register access using dereferenced pointers.</td>
-*     <td>Makes register access device-independent, so that the PDL does 
+*     <td>Makes register access device-independent, so that the PDL does
 *         not need to be recompiled for each supported part number.</td>
 *   </tr>
 *   <tr>
@@ -526,7 +545,7 @@ typedef double   float64_t; /**< Specific-length typedef for the basic numerical
 * Defines for the Assert Classes and Levels
 */
 
-/** 
+/**
 * Class 1 - The highest class, safety-critical functions which rely on parameters that could be
 * changed between different PSoC devices
 */

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sd_host.h

@@ -1,13 +1,13 @@
 /***************************************************************************//**
 * \file cy_ctb.c
-* \version 1.10.1
+* \version 1.10.2
 *
 * \brief
 * Provides the public functions for the CTB driver.
 *
 ********************************************************************************
 * \copyright
-* Copyright 2017-2019 Cypress Semiconductor Corporation
+* Copyright 2017-2020 Cypress Semiconductor Corporation
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
@@ -153,6 +153,9 @@ const cy_stc_ctb_fast_config_oa1_t Cy_CTB_Fast_Opamp1_Vdac_Ref_Pin5 =
 *
 * Initialize or restore the CTB and both opamps according to the
 * provided settings. Parameters are usually set only once, at initialization.
+* 
+* \note This function call disables a whole CTB block, 
+* call \ref Cy_CTB_Enable after this function call.
 *
 * \param base
 * Pointer to structure describing registers

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syslib.h

@@ -1,6 +1,6 @@
 /*******************************************************************************
 * \file cy_sd_host.c
-* \version 1.40
+* \version 1.50
 *
 * \brief
 *  This file provides the driver code to the API for the SD Host Controller
@@ -4829,18 +4829,18 @@ uint32_t Cy_SD_Host_GetPresentState(SDHC_Type const *base)
 * \ref Cy_SysPm_CpuEnterDeepSleep : specify \ref CY_SYSPM_DEEPSLEEP as the callback
 * type and call \ref Cy_SysPm_RegisterCallback.
 *
-* \note When waking up from Deep Sleep, the SD Host driver requires up to 100ms
+* \note When waking up from Deep Sleep, the SD Host driver requires up to 1 us
 * for clock stabilization. By default the SD Host driver will wait this length
 * of time on power up. The waiting loop is implemented in this function.
 * If the application is time sensitive this delay can be overridden by the
-* application by defining \ref CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP to a lower
-* value. This allows the application to perform other operations while the clock
+* application by defining \ref CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP.
+* This allows the application to perform other operations while the clock
 * is stabilizing in the background. However, the application must still make sure
 * that the SD Host clock has had time to stabilize before attempting to use the
 * SD card. The recommended way to override the value is to specify this as
-* a custom define on the compiler command line.  This can be done by appending
+* a custom define on the compiler command line. This can be done by appending
 * the entry to the DEFINES variable in the application Makefile.
-* Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP=40.
+* Eg: DEFINES+=CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP=40.
 *
 * \param callbackParams
 * The pointer to the callback parameters structure
@@ -4894,7 +4894,7 @@ cy_en_syspm_status_t Cy_SD_Host_DeepSleepCallback(cy_stc_syspm_callback_params_t
             Cy_SD_Host_EnableSdClk(locBase);
 
             /* Wait for the stable CLK */
-            Cy_SysLib_Delay(CY_SD_HOST_CLK_RAMP_UP_TIME_MS_WAKEUP);
+            Cy_SysLib_DelayUs(CY_SD_HOST_CLK_RAMP_UP_TIME_US_WAKEUP);
 
             ret = CY_SYSPM_SUCCESS;
         }

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ctb.c

@@ -1,6 +1,6 @@
 /***************************************************************************//**
 * \file cy_syslib.c
-* \version 2.50.2
+* \version 2.50.3
 *
 *  Description:
 *   Provides system API implementation for the SysLib driver.
@@ -71,7 +71,7 @@
 * \param milliseconds  The number of milliseconds to delay.
 *
 * \note The function calls \ref Cy_SysLib_DelayCycles() API to generate a delay.
-*       If the function parameter (milliseconds) is bigger than 
+*       If the function parameter (milliseconds) is bigger than
 *       CY_DELAY_MS_OVERFLOW constant, then an additional loop runs to prevent
 *       an overflow in parameter passed to \ref Cy_SysLib_DelayCycles() API.
 *
@@ -294,7 +294,7 @@ void Cy_SysLib_ClearResetReason(void)
      */
     SRSS_RES_CAUSE  = 0xFFFFFFFFU;
     SRSS_RES_CAUSE2 = 0xFFFFFFFFU;
-    
+
     if(0U != _FLD2VAL(SRSS_PWR_HIBERNATE_TOKEN, SRSS_PWR_HIBERNATE))
     {
         /* Clears PWR_HIBERNATE token */
@@ -556,7 +556,7 @@ void Cy_SysLib_SetWaitStates(bool ulpMode, uint32_t clkHfMHz)
         waitStates =  (clkHfMHz <= cy_device->flashCtlMainWs0Freq) ? 0UL :
                      ((clkHfMHz <= cy_device->flashCtlMainWs1Freq) ? 1UL :
                      ((clkHfMHz <= cy_device->flashCtlMainWs2Freq) ? 2UL :
-                     ((clkHfMHz <= cy_device->flashCtlMainWs3Freq) ? 3UL : 
+                     ((clkHfMHz <= cy_device->flashCtlMainWs3Freq) ? 3UL :
                      ((clkHfMHz <= cy_device->flashCtlMainWs4Freq) ? 4UL : 5UL))));
     }
 

targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sd_host.c

@@ -170,8 +170,8 @@
 
    <!-- TCPKA Offload settings -->
     <ParamBool id="tcpkaOffload" name="Enable" group="TCP Keep Alive Offload" default="false" visible="true" editable="true" desc="Enable TCP Keep Alive offload feature." />
-    <ParamRange id="tcpkaInterval" name="Interval" group="TCP Keep Alive Offload" default="20" min="0" max="65535" resolution="1" visible="`${tcpkaOffload}`" editable="`${tcpkaOffload}`" desc="Interval in seconds between keep alive transmissions." />
-    <ParamRange id="tcpkaRetryInterval" name="Retry Interval" group="TCP Keep Alive Offload" default="3" min="0" max="65535" resolution="1" visible="`${tcpkaOffload}`" editable="`${tcpkaOffload}`" desc="Interval in seconds to retry a transmission if no keep alive ACK is received." />
+    <ParamRange id="tcpkaInterval" name="Interval (s)" group="TCP Keep Alive Offload" default="20" min="0" max="65535" resolution="1" visible="`${tcpkaOffload}`" editable="`${tcpkaOffload}`" desc="Interval in seconds between keep alive transmissions." />
+    <ParamRange id="tcpkaRetryInterval" name="Retry Interval (s)" group="TCP Keep Alive Offload" default="3" min="0" max="65535" resolution="1" visible="`${tcpkaOffload}`" editable="`${tcpkaOffload}`" desc="Interval in seconds to retry a transmission if no keep alive ACK is received." />
     <ParamRange id="tcpkaRetryCount" name="Retry Count" group="TCP Keep Alive Offload" default="3" min="0" max="65535" resolution="1" visible="`${tcpkaOffload}`" editable="`${tcpkaOffload}`" desc="Number of retries to send a keep alive if no ACK is received." />
     <!-- Up to 4 simultaneous connections -->
     <Repeat count="4">
@@ -205,14 +205,14 @@
     <ConfigInclude value="cy_lpa_wifi_ol.h" include="true" />
     <ConfigInclude value="cy_lpa_wifi_ol_common.h" include="true" />
     <ConfigInclude value="cy_lpa_wifi_arp_ol.h" include="`${arpOffload}`" />
-    <ConfigInclude value="cy_lpa_wifi_pf_ol.h" include="true" />
+    <ConfigInclude value="cy_lpa_wifi_pf_ol.h" include="`${pktFilterEn}`" />
     <ConfigInclude value="cy_lpa_wifi_tko_ol.h" include="`${tcpkaOffload}`" />
     <ConfigInclude value="cycfg_pins.h" include="`${hostWake}`" />
 
     <ConfigDefine name="CYCFG_WIFI_HOST_WAKE_ENABLED" public="true" value="(`${hostIRQConnected ? 1 : 0}`u)" include="`${hostWake}`" preventOverride="false" />
     <ConfigDefine name="CYCFG_ARP_OL_ENABLED" public="false" value="(1u)" include="`${arpOffload}`" preventOverride="false" />
     <ConfigDefine name="CYCFG_PF_OL_ENABLED" public="false" value="(1u)" include="`${pktFilterEn}`" preventOverride="false" />
-    <ConfigDefine name="CYCFG_TKO_OL_ENABLED" public="false" value="(1u)" include="`${pktFilterEn}`" preventOverride="false" />
+    <ConfigDefine name="CYCFG_TKO_OL_ENABLED" public="false" value="(1u)" include="`${tcpkaOffload}`" preventOverride="false" />
 
     <!-- HOST_WAKE Pin Configuration -->
     <ConfigDefine name="CYCFG_WIFI_HOST_WAKE_GPIO" public="true" value="`${hostIRQConnected ? hostIRQ . &quot;_HAL_PORT_PIN&quot; : &quot;CYHAL_NC_PIN_VALUE&quot;}`" include="`${hostWake}`" preventOverride="false" />
@@ -234,7 +234,7 @@
     </ConfigStruct>
 
     <!-- Packet Filter (PF) Offload Configuration -->
-    <ConfigStruct name="cy_pf_ol_cfg_0" type="cy_pf_ol_cfg_t" const="true" isArray="true" public="false" include="true">
+    <ConfigStruct name="cy_pf_ol_cfg_0" type="cy_pf_ol_cfg_t" const="true" isArray="true" public="false" include="`${pktFilterEn}`">
       <Member name="`${configTLSID}`u" value="{.feature = CY_PF_OL_FEAT_PORTNUM,&#xA;`${longIndent}`.bits = `${filterTLSAllow}``${filterTLSAction eq CY_PF_ACTION_DISCARD ? (&quot; | CY_PF_ACTION_DISCARD&quot;) : (&quot;&quot;)}`,&#xA;`${longIndent}`.id = `${configTLSID}`u,&#xA;`${longIndent}`.u = {&#xA;&#9;`${longIndent}`.pf = {&#xA;`${longIndent}``${longIndent}`.portnum = {.portnum = `${filterTLSPort}`u,&#xA;`${longIndent}``${longIndent}``${longIndent}`.range = 0u,&#xA;`${longIndent}``${longIndent}``${longIndent}`.direction = `${filterTLSDir}`,},&#xA;`${longIndent}``${longIndent}`.proto = `${filterTLSProt}`,&#xA;&#9;&#9;`${longIndent}`},&#xA;&#9;`${longIndent}`},&#xA;`${longIndent}`}" include="`${configTLS}`" />
 
       <Member name="`${configNonTLSID}`u" value="{.feature = CY_PF_OL_FEAT_PORTNUM,&#xA;`${longIndent}`.bits = `${filterNonTLSAllow}``${filterNonTLSAction eq CY_PF_ACTION_DISCARD ? (&quot; | CY_PF_ACTION_DISCARD&quot;) : (&quot;&quot;)}`,&#xA;`${longIndent}`.id = `${configNonTLSID}`u,&#xA;`${longIndent}`.u = {&#xA;&#9;`${longIndent}`.pf = {&#xA;`${longIndent}``${longIndent}`.portnum = {.portnum = `${filterNonTLSPort}`u,&#xA;`${longIndent}``${longIndent}``${longIndent}`.range = 0u,&#xA;`${longIndent}``${longIndent}``${longIndent}`.direction = `${filterNonTLSDir}`,},&#xA;`${longIndent}``${longIndent}`.proto = `${filterNonTLSProt}`,&#xA;&#9;&#9;`${longIndent}`},&#xA;&#9;`${longIndent}`},&#xA;`${longIndent}`}" include="`${configNonTLS}`" />