From 149656447d8ecdb8af3bce91c204e07a7891ecfe Mon Sep 17 00:00:00 2001 From: Marcelo Salazar Date: Thu, 7 May 2020 13:54:11 +0100 Subject: [PATCH 1/2] Remove target dep. on S2LP driver --- .../stm-s2lp-rf-driver/mbed_lib.json | 72 +++- .../source/NanostackRfPhys2lp.cpp | 22 +- .../stm-s2lp-rf-driver/NanostackRfPhys2lp.h | 113 +++-- .../TARGET_MTB_STM_S2LP/PeripheralNames.h | 102 ----- .../TARGET_MTB_STM_S2LP/PeripheralPins.c | 363 ---------------- .../TARGET_MTB_STM_S2LP/PinNames.h | 389 ------------------ .../TARGET_MTB_STM_S2LP/system_clock.c | 196 --------- targets/targets.json | 44 -- tools/test_configs/Wi-SUNInterface.json | 3 - 9 files changed, 122 insertions(+), 1182 deletions(-) delete mode 100644 targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PinNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/system_clock.c diff --git a/components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json b/components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json index 80c1ad14b8e..55e4bf17484 100644 --- a/components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json +++ b/components/802.15.4_RF/stm-s2lp-rf-driver/mbed_lib.json @@ -1,17 +1,73 @@ { "name": "s2lp", "config": { + "SPI_SDI": { + "help": "SPI_SDI pin for SPI connection. D11 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_SDO": { + "help": "SPI_SDO pin for SPI connection. D12 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_SCLK": { + "help": "SPI_SCLK pin for SPI connection, D13 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_CS": { + "help": "SPI_CS pin for SPI connection, A1 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_SDN": { + "help": "SPI_SDN pin for SPI connection, D7 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "TEST_PIN_TX": { + "help": "TEST_PIN_TX pin for serial connection, D6 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "TEST_PIN_RX": { + "help": "TEST_PIN_RX pin for serial connection, D5 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "TEST_PIN_CSMA": { + "help": "TEST_PIN_CSMA pin for CSMA, D4 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "TEST_PIN_SPARE_1": { + "help": "TEST_PIN_SPARE_1 pin for testing, D2 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "TEST_PIN_SPARE_2": { + "help": "TEST_PIN_SPARE_2 pin for testing, D8 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_GPIO0": { + "help": "SPI_GPIO0 pin for GPIO testing, A0 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_GPIO1": { + "help": "SPI_GPIO1 pin for GPIO testing, A2 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_GPIO2": { + "help": "SPI_GPIO2 pin for GPIO testing, A3 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "SPI_GPIO3": { + "help": "SPI_GPIO3 pin for GPIO testing, A5 assumed, needs to be set/overwritten otherwise", + "value": null + }, + "I2C_SDA": { + "help": "I2C_SDA pin for I2C SDA, null assumed, needs to be set/overwritten otherwise", + "value": null + }, + "I2C_SCL": { + "help": "I2C_SCL pin for I2C SCL, null assumed, needs to be set/overwritten otherwise", + "value": null + }, "provide-default": { "help": "Provide default NanostackRfpy. [true/false]", "value": false - }, - "target_overrides": { - "MTB_STM_S2LP": { - "s2lp.provide-default": true - }, - "MTB_STM_S2LP_CT": { - "s2lp.provide-default": true - } } } } diff --git a/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp b/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp index 1ed861eb165..ad8176b7eef 100644 --- a/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp +++ b/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp @@ -1303,18 +1303,18 @@ void NanostackRfPhys2lp::rf_unregister() } NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn - ,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3 + , PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3 #ifdef AT24MAC - ,PinName i2c_sda, PinName i2c_scl + , PinName i2c_sda, PinName i2c_scl #endif //AT24MAC - ) + ) : #ifdef AT24MAC - _mac(i2c_sda, i2c_scl), + _mac(i2c_sda, i2c_scl), #endif //AT24MAC - _mac_addr(), _rf(NULL), _mac_set(false), - _spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn), - _spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3) + _mac_addr(), _rf(NULL), _mac_set(false), + _spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn), + _spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3) { _rf = new RFPins(_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn, _spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3); #ifdef TEST_GPIOS_ENABLED @@ -1423,12 +1423,12 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t * #if MBED_CONF_S2LP_PROVIDE_DEFAULT NanostackRfPhy &NanostackRfPhy::get_default_instance() { - static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN - ,S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3 + static NanostackRfPhys2lp rf_phy(MBED_CONF_S2LP_SPI_SDI, MBED_CONF_S2LP_SPI_SDO, MBED_CONF_S2LP_SPI_SCLK, MBED_CONF_S2LP_SPI_CS, MBED_CONF_S2LP_SPI_SDN + , MBED_CONF_S2LP_SPI_GPIO0, MBED_CONF_S2LP_SPI_GPIO1, MBED_CONF_S2LP_SPI_GPIO2, MBED_CONF_S2LP_SPI_GPIO3 #ifdef AT24MAC - ,S2LP_I2C_SDA, S2LP_I2C_SCL + , MBED_CONF_S2LP_I2C_SDA, MBED_CONF_S2LP_I2C_SCL #endif //AT24MAC - ); + ); return rf_phy; } #endif // MBED_CONF_S2LP_PROVIDE_DEFAULT diff --git a/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h b/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h index d15dcd84bf5..6dcd0995ff4 100644 --- a/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h +++ b/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h @@ -25,87 +25,68 @@ #include "InterruptIn.h" #include "SPI.h" -// Uncomment to use testing gpios attached to TX/RX processes -// #define TEST_GPIOS_ENABLED - -#if defined(TARGET_MTB_STM_S2LP) || defined(TARGET_MTB_STM_S2LP_CT) -#if !defined(S2LP_SPI_SDI) -#define S2LP_SPI_SDI PA_7 -#endif -#if !defined(S2LP_SPI_SDO) -#define S2LP_SPI_SDO PA_6 -#endif -#if !defined(S2LP_SPI_SCLK) -#define S2LP_SPI_SCLK PA_5 -#endif -#if !defined(S2LP_SPI_CS) -#define S2LP_SPI_CS PC_0 -#endif -#if !defined(S2LP_SPI_SDN) -#define S2LP_SPI_SDN PF_13 -#endif -#if !defined(S2LP_SPI_GPIO0) -#define S2LP_SPI_GPIO0 PA_3 -#endif -#if !defined(S2LP_SPI_GPIO1) -#define S2LP_SPI_GPIO1 PC_3 +#if !defined(MBED_CONF_S2LP_SPI_SDI) +#define MBED_CONF_S2LP_SPI_SDI D11 #endif -#if !defined(S2LP_SPI_GPIO2) -#define S2LP_SPI_GPIO2 PF_3 -#endif -#if !defined(S2LP_SPI_GPIO3) -#define S2LP_SPI_GPIO3 PF_10 -#endif -#if !defined(S2LP_I2C_SDA) -#define S2LP_I2C_SDA PB_7 -#endif -#if !defined(S2LP_I2C_SCL) -#define S2LP_I2C_SCL PB_6 -#endif -#define AT24MAC -#else -#if !defined(S2LP_SPI_SDI) -#define S2LP_SPI_SDI D11 + +#if !defined(MBED_CONF_S2LP_SPI_SDO) +#define MBED_CONF_S2LP_SPI_SDO D12 #endif -#if !defined(S2LP_SPI_SDO) -#define S2LP_SPI_SDO D12 + +#if !defined(MBED_CONF_S2LP_SPI_SCLK) +#define MBED_CONF_S2LP_SPI_SCLK D13 #endif -#if !defined(S2LP_SPI_SCLK) -#define S2LP_SPI_SCLK D13 + +#if !defined(MBED_CONF_S2LP_SPI_CS) +#define MBED_CONF_S2LP_SPI_CS A1 #endif -#if !defined(S2LP_SPI_CS) -#define S2LP_SPI_CS A1 + +#if !defined(MBED_CONF_S2LP_SPI_SDN) +#define MBED_CONF_S2LP_SPI_SDN D7 #endif -#if !defined(S2LP_SPI_SDN) -#define S2LP_SPI_SDN D7 + +#if !defined(MBED_CONF_S2LP_TEST_PIN_TX) +#define MBED_CONF_S2LP_TEST_PIN_TX D6 #endif -#if !defined(TEST_PIN_TX) -#define TEST_PIN_TX D6 + +#if !defined(MBED_CONF_S2LP_TEST_PIN_RX) +#define MBED_CONF_S2LP_TEST_PIN_RX D5 #endif -#if !defined(TEST_PIN_RX) -#define TEST_PIN_RX D5 + +#if !defined(TMBED_CONF_S2LP_TEST_PIN_CSMA) +#define MBED_CONF_S2LP_TEST_PIN_CSMA D4 #endif -#if !defined(TEST_PIN_CSMA) -#define TEST_PIN_CSMA D4 + +#if !defined(MBED_CONF_S2LP_TEST_PIN_SPARE_1) +#define MBED_CONF_S2LP_TEST_PIN_SPARE_1 D2 #endif -#if !defined(TEST_PIN_SPARE_1) -#define TEST_PIN_SPARE_1 D2 + +#if !defined(MBED_CONF_S2LP_TEST_PIN_SPARE_2) +#define MBED_CONF_S2LP_TEST_PIN_SPARE_2 D8 #endif -#if !defined(TEST_PIN_SPARE_2) -#define TEST_PIN_SPARE_2 D8 + +#if !defined(MBED_CONF_S2LP_SPI_GPIO0) +#define MBED_CONF_S2LP_SPI_GPIO0 A0 #endif -#if !defined(S2LP_SPI_GPIO0) -#define S2LP_SPI_GPIO0 A0 + +#if !defined(MBED_CONF_S2LP_SPI_GPIO1) +#define MBED_CONF_S2LP_SPI_GPIO1 A2 #endif -#if !defined(S2LP_SPI_GPIO1) -#define S2LP_SPI_GPIO1 A2 + +#if !defined(MBED_CONF_S2LP_SPI_GPIO2) +#define MBED_CONF_S2LP_SPI_GPIO2 A3 #endif -#if !defined(S2LP_SPI_GPIO2) -#define S2LP_SPI_GPIO2 A3 + +#if !defined(MBED_CONF_S2LP_SPI_GPIO3) +#define MBED_CONF_S2LP_SPI_GPIO3 A5 #endif -#if !defined(S2LP_SPI_GPIO3) -#define S2LP_SPI_GPIO3 A5 + +#if !defined(MBED_CONF_S2LP_I2C_SDA) +#define MBED_CONF_S2LP_I2C_SDA null #endif + +#if !defined(MBED_CONF_S2LP_I2C_SCL) +#define MBED_CONF_S2LP_I2C_SCL null #endif #include "at24mac_s2lp.h" diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralNames.h deleted file mode 100644 index ae50b3171e6..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralNames.h +++ /dev/null @@ -1,102 +0,0 @@ -/* mbed Microcontroller Library -* SPDX-License-Identifier: BSD-3-Clause - ******************************************************************************* - * Copyright (c) 2016, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ -#ifndef MBED_PERIPHERALNAMES_H -#define MBED_PERIPHERALNAMES_H - -#include "cmsis.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ADC_1 = (int)ADC1_BASE, - ADC_2 = (int)ADC2_BASE, - ADC_3 = (int)ADC3_BASE -} ADCName; - -typedef enum { - DAC_1 = (int)DAC_BASE -} DACName; - -typedef enum { - UART_1 = (int)USART1_BASE, - UART_2 = (int)USART2_BASE, - UART_3 = (int)USART3_BASE, - UART_4 = (int)UART4_BASE, - UART_5 = (int)UART5_BASE, - UART_6 = (int)USART6_BASE, - UART_7 = (int)UART7_BASE, - UART_8 = (int)UART8_BASE -} UARTName; - - -#define SPI_COUNT 6 -typedef enum { - SPI_1 = (int)SPI1_BASE, - SPI_2 = (int)SPI2_BASE, - SPI_3 = (int)SPI3_BASE, - SPI_4 = (int)SPI4_BASE, - SPI_5 = (int)SPI5_BASE, - SPI_6 = (int)SPI6_BASE -} SPIName; - -typedef enum { - I2C_1 = (int)I2C1_BASE, - I2C_2 = (int)I2C2_BASE, - I2C_3 = (int)I2C3_BASE -} I2CName; - -typedef enum { - PWM_1 = (int)TIM1_BASE, - PWM_2 = (int)TIM2_BASE, - PWM_3 = (int)TIM3_BASE, - PWM_4 = (int)TIM4_BASE, - PWM_5 = (int)TIM5_BASE, - PWM_8 = (int)TIM8_BASE, - PWM_9 = (int)TIM9_BASE, - PWM_10 = (int)TIM10_BASE, - PWM_11 = (int)TIM11_BASE, - PWM_12 = (int)TIM12_BASE, - PWM_13 = (int)TIM13_BASE, - PWM_14 = (int)TIM14_BASE -} PWMName; - -typedef enum { - CAN_1 = (int)CAN1_BASE, - CAN_2 = (int)CAN2_BASE -} CANName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralPins.c deleted file mode 100644 index 9cf05f63590..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralPins.c +++ /dev/null @@ -1,363 +0,0 @@ -/* mbed Microcontroller Library -* SPDX-License-Identifier: BSD-3-Clause - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 - {PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 - {PA_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 - {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 - {PA_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - {PA_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 - {PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 - {PA_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 - {PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 - {PA_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 - {PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 - {PA_6_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 - {PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PA_7_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 // Connected to LD1 - {PB_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 // Connected to LD1 - {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 - {PB_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 - {PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 - {PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 - {PC_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 - {PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 // Connected to RMII_MDC [LAN8742A-CZ-TR_MDC] - {PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 // Connected to RMII_MDC [LAN8742A-CZ-TR_MDC] - {PC_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 // Connected to RMII_MDC [LAN8742A-CZ-TR_MDC] - {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 - {PC_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 - {PC_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 - {PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 - {PC_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 - {PC_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 - {PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 // Connected to RMII_RXD0 [LAN8742A-CZ-TR_RXD0] - {PC_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 // Connected to RMII_RXD0 [LAN8742A-CZ-TR_RXD0] - {PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 // Connected to RMII_RXD1 [LAN8742A-CZ-TR_RXD1] - {PC_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 // Connected to RMII_RXD1 [LAN8742A-CZ-TR_RXD1] - {PF_3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 - {PF_4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 - {PF_5, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 - {PF_6, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 - {PF_7, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 - {PF_8, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 - {PF_9, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 - {PF_10, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 - {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD2 [Blue] - {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PC_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to USB_SOF [TP1] - {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PF_1, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM5 cannot be used because already used by the us_ticker -MBED_WEAK const PinMap PinMap_PWM[] = { - {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 -// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] -// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] -// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_2_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 -// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - {PA_3_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 - {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PA_6_ALT0, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PA_7_ALT2, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 // Connected to USB_SOF [TP1] - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 // Connected to USB_VBUS - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 // Connected to USB_ID - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 // Connected to USB_DM - {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to LD1 - {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to LD1 - {PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to LD1 - {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - {PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - {PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to LD2 [Blue] - {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - {PB_8_ALT0, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 - {PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - {PB_9_ALT0, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 - {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] - {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to LD3 [Red] - {PB_14_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to LD3 [Red] - {PB_14_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 // Connected to LD3 [Red] - {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - {PB_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - {PB_15_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 - {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 - {PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 - {PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - {PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 - {PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - {PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 - {PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - {PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 - {PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - {PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - {PE_5, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 - {PE_6, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 - {PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - {PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - {PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - {PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - {PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - {PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - {PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 - {PF_6, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 - {PF_7, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 - {PF_8, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 - {PF_9, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { - {PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to RMII_MDIO [LAN8742A-CZ-TR_MDIO] - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_VBUS - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, - {PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX - {PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, - {PE_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, - {PF_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, - {PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { - {PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_ID - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to LD2 [Blue] - {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, - {PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_RX - {PE_0, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, - {PE_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, - {PF_6, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, - {PG_9, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { - {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to RMII_REF_CLK [LAN8742A-CZ-TR_REFCLK0] - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_DP - {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to LD3 [Red] - {PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { - {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_DM - {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] - {PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, // Connected to RMII_TXD0 [LAN8742A-CZ-TR_TXD0] - {PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to RMII_CRS_DV [LAN8742A-CZ-TR_CRS_DV] - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI3)}, - {PE_6, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PE_14, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PF_9, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, - {PF_11, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, - {PG_14, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LD3 [Red] - {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PE_5, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PE_13, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PF_8, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, - {PG_12, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] - {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PF_7, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, - {PG_13, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, // Connected to RMII_TXD0 [LAN8742A-CZ-TR_TXD0] - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PE_4, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, - {PF_6, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)}, - {PG_8, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, - {NC, NC, 0} -}; - -//*** CAN *** - -MBED_WEAK const PinMap PinMap_CAN_RD[] = { - {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to USB_DM - {PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, - {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, - {PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, - {PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_CAN_TD[] = { - {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // Connected to USB_DP - {PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, - {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, - {PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, // Connected to RMII_TXD1 [LAN8742A-CZ-TR_TXD1] - {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PinNames.h deleted file mode 100644 index 591a31ee72c..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PinNames.h +++ /dev/null @@ -1,389 +0,0 @@ -/* mbed Microcontroller Library -* SPDX-License-Identifier: BSD-3-Clause - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400 -} ALTx; - -typedef enum { - PA_0 = 0x00, - PA_0_ALT0 = PA_0 | ALT0, - PA_0_ALT1 = PA_0 | ALT1, - PA_1 = 0x01, - PA_1_ALT0 = PA_1 | ALT0, - PA_1_ALT1 = PA_1 | ALT1, - PA_2 = 0x02, - PA_2_ALT0 = PA_2 | ALT0, - PA_2_ALT1 = PA_2 | ALT1, - PA_3 = 0x03, - PA_3_ALT0 = PA_3 | ALT0, - PA_3_ALT1 = PA_3 | ALT1, - PA_4 = 0x04, - PA_4_ALT0 = PA_4 | ALT0, - PA_5 = 0x05, - PA_5_ALT0 = PA_5 | ALT0, - PA_5_ALT1 = PA_5 | ALT1, - PA_6 = 0x06, - PA_6_ALT0 = PA_6 | ALT0, - PA_7 = 0x07, - PA_7_ALT0 = PA_7 | ALT0, - PA_7_ALT1 = PA_7 | ALT1, - PA_7_ALT2 = PA_7 | ALT2, - PA_8 = 0x08, - PA_9 = 0x09, - PA_10 = 0x0A, - PA_11 = 0x0B, - PA_12 = 0x0C, - PA_13 = 0x0D, - PA_14 = 0x0E, - PA_15 = 0x0F, - PA_15_ALT0 = PA_15 | ALT0, - - PB_0 = 0x10, - PB_0_ALT0 = PB_0 | ALT0, - PB_0_ALT1 = PB_0 | ALT1, - PB_1 = 0x11, - PB_1_ALT0 = PB_1 | ALT0, - PB_1_ALT1 = PB_1 | ALT1, - PB_2 = 0x12, - PB_3 = 0x13, - PB_3_ALT0 = PB_3 | ALT0, - PB_4 = 0x14, - PB_4_ALT0 = PB_4 | ALT0, - PB_5 = 0x15, - PB_5_ALT0 = PB_5 | ALT0, - PB_6 = 0x16, - PB_7 = 0x17, - PB_8 = 0x18, - PB_8_ALT0 = PB_8 | ALT0, - PB_9 = 0x19, - PB_9_ALT0 = PB_9 | ALT0, - PB_10 = 0x1A, - PB_11 = 0x1B, - PB_12 = 0x1C, - PB_13 = 0x1D, - PB_14 = 0x1E, - PB_14_ALT0 = PB_14 | ALT0, - PB_14_ALT1 = PB_14 | ALT1, - PB_15 = 0x1F, - PB_15_ALT0 = PB_15 | ALT0, - PB_15_ALT1 = PB_15 | ALT1, - - PC_0 = 0x20, - PC_0_ALT0 = PC_0 | ALT0, - PC_0_ALT1 = PC_0 | ALT1, - PC_1 = 0x21, - PC_1_ALT0 = PC_1 | ALT0, - PC_1_ALT1 = PC_1 | ALT1, - PC_2 = 0x22, - PC_2_ALT0 = PC_2 | ALT0, - PC_2_ALT1 = PC_2 | ALT1, - PC_3 = 0x23, - PC_3_ALT0 = PC_3 | ALT0, - PC_3_ALT1 = PC_3 | ALT1, - PC_4 = 0x24, - PC_4_ALT0 = PC_4 | ALT0, - PC_5 = 0x25, - PC_5_ALT0 = PC_5 | ALT0, - PC_6 = 0x26, - PC_6_ALT0 = PC_6 | ALT0, - PC_7 = 0x27, - PC_7_ALT0 = PC_7 | ALT0, - PC_8 = 0x28, - PC_8_ALT0 = PC_8 | ALT0, - PC_9 = 0x29, - PC_9_ALT0 = PC_9 | ALT0, - PC_10 = 0x2A, - PC_10_ALT0 = PC_10 | ALT0, - PC_11 = 0x2B, - PC_11_ALT0 = PC_11 | ALT0, - PC_12 = 0x2C, - PC_13 = 0x2D, - PC_14 = 0x2E, - PC_15 = 0x2F, - - PD_0 = 0x30, - PD_1 = 0x31, - PD_2 = 0x32, - PD_3 = 0x33, - PD_4 = 0x34, - PD_5 = 0x35, - PD_6 = 0x36, - PD_7 = 0x37, - PD_8 = 0x38, - PD_9 = 0x39, - PD_10 = 0x3A, - PD_11 = 0x3B, - PD_12 = 0x3C, - PD_13 = 0x3D, - PD_14 = 0x3E, - PD_15 = 0x3F, - - PE_0 = 0x40, - PE_1 = 0x41, - PE_2 = 0x42, - PE_3 = 0x43, - PE_4 = 0x44, - PE_5 = 0x45, - PE_6 = 0x46, - PE_7 = 0x47, - PE_8 = 0x48, - PE_9 = 0x49, - PE_10 = 0x4A, - PE_11 = 0x4B, - PE_12 = 0x4C, - PE_13 = 0x4D, - PE_14 = 0x4E, - PE_15 = 0x4F, - - PF_0 = 0x50, - PF_1 = 0x51, - PF_2 = 0x52, - PF_3 = 0x53, - PF_4 = 0x54, - PF_5 = 0x55, - PF_6 = 0x56, - PF_7 = 0x57, - PF_8 = 0x58, - PF_9 = 0x59, - PF_10 = 0x5A, - PF_11 = 0x5B, - PF_12 = 0x5C, - PF_13 = 0x5D, - PF_14 = 0x5E, - PF_15 = 0x5F, - - PG_0 = 0x60, - PG_1 = 0x61, - PG_2 = 0x62, - PG_3 = 0x63, - PG_4 = 0x64, - PG_5 = 0x65, - PG_6 = 0x66, - PG_7 = 0x67, - PG_8 = 0x68, - PG_9 = 0x69, - PG_10 = 0x6A, - PG_11 = 0x6B, - PG_12 = 0x6C, - PG_13 = 0x6D, - PG_14 = 0x6E, - PG_15 = 0x6F, - - PH_0 = 0x70, - PH_1 = 0x71, - - // ADC internal channels - ADC_TEMP = 0xF0, - ADC_VREF = 0xF1, - ADC_VBAT = 0xF2, - - // Not connected - NC = (int)0xFFFFFFFF, - - // STDIO for console print -#ifdef MBED_CONF_TARGET_STDIO_UART_TX - STDIO_UART_TX = MBED_CONF_TARGET_STDIO_UART_TX, -#else - STDIO_UART_TX = PA_9, -#endif -#ifdef MBED_CONF_TARGET_STDIO_UART_RX - STDIO_UART_RX = MBED_CONF_TARGET_STDIO_UART_RX, -#else - STDIO_UART_RX = PA_10, -#endif - - // Generic signals namings - LED1 = PE_2, // LD1 = RED - LED2 = PE_3, // Blue - LED3 = PE_4, // Green - - LED_RED = LED1, - LED_BLUE = LED2, - LED_GREEN = LED3, - - // Standardized button names - USER_BUTTON = PB_0, - BUTTON1 = USER_BUTTON, - - SERIAL_TX = STDIO_UART_TX, // Virtual Com Port - SERIAL_RX = STDIO_UART_RX, // Virtual Com Port - USBTX = STDIO_UART_TX, // Virtual Com Port - USBRX = STDIO_UART_RX, // Virtual Com Port - - SERIAL_TX1 = PE_8, - SERIAL_RX1 = PE_7, - - I2C0_SCL = PB_6, - I2C0_SDA = PB_7, - - I2C1_SCL = PB_8, - I2C1_SDA = PC_9, - - //Default I2C - I2C_SCL = I2C0_SCL, - I2C_SDA = I2C0_SDA, - - SPI0_MOSI = PA_7, - SPI0_MISO = PA_6, - SPI0_SCK = PA_5, - SPI0_CS = PC_0, - - SPI1_MOSI = PB_15, - SPI1_MISO = PB_14, - SPI1_SCK = PB_10, - SPI1_CS = PD_1, //MX25R Chip Select - - SPI2_MOSI = PC_12, - SPI2_MISO = PC_11, - SPI2_SCK = PC_10, - SPI2_CS = NC, - - /* - SPI3_MOSI = PE_6, - SPI3_MISO = PE_5, - SPI3_SCK = PE_12, - SPI3_CS = PE_11, - */ - //Default SPI, connected to S2_LP on MCB. - SPI_MOSI = SPI0_MOSI, - SPI_MISO = SPI0_MISO, - SPI_SCK = SPI0_SCK, - SPI_CS = SPI0_CS, - - /**** ETHERNET pins ****/ - ETH_COL = PA_3, - ETH_CRS = PA_0, - ETH_CRS_DV = PA_7, - ETH_MDC = PC_1, - ETH_MDIO = PA_2, - ETH_PPS_OUT = PG_8, - ETH_PPS_OUT_ALT0 = PB_5, - ETH_REF_CLK = PA_1, - ETH_RXD0 = PC_4, - ETH_RXD1 = PC_5, - ETH_RXD2 = PB_0, - ETH_RXD3 = PB_1, - ETH_RX_CLK = PA_1, - ETH_RX_DV = PA_7, - ETH_RX_ER = PB_10, - ETH_TXD0 = PB_12, - ETH_TXD0_ALT0 = PG_13, - ETH_TXD1 = PB_13, - ETH_TXD1_ALT0 = PG_14, - ETH_TXD2 = PC_2, - ETH_TXD3 = PE_2, - ETH_TXD3_ALT0 = PB_8, - ETH_TX_CLK = PC_3, - ETH_TX_EN = PB_11, - ETH_TX_EN_ALT0 = PG_11, - - /**** OSCILLATOR pins ****/ - RCC_OSC32_IN = PC_14, - RCC_OSC32_OUT = PC_15, - RCC_OSC_IN = PH_0, - RCC_OSC_OUT = PH_1, - - /**** DEBUG pins ****/ - SYS_JTCK_SWCLK = PA_14, - SYS_JTDI = PA_15, - SYS_JTDO_SWO = PB_3, - SYS_JTMS_SWDIO = PA_13, - SYS_JTRST = PB_4, - SYS_TRACECLK = PE_2, - SYS_TRACED0 = PE_3, - SYS_TRACED1 = PE_4, - SYS_TRACED2 = PE_5, - SYS_TRACED3 = PE_6, - SYS_WKUP = PA_0, - - UART1_TX = PE_8, - UART1_RX = PE_7, - - UART2_TX = PE_1, - UART2_RX = PE_0, - - /* - CAN1_TXD = PD_1, - CAN1_RXD = PD_0, - */ - - //MTB aliases. - TX1 = UART1_TX, - RX1 = UART1_RX, - SDA1 = I2C0_SDA, - SCL1 = I2C0_SCL, - MOSI1 = SPI1_MOSI, - MISO1 = SPI1_MISO, - SCK1 = PB_10, - GP0 = USER_BUTTON, - GP1 = PB_1, - AIN0 = PA_0, - AIN1 = PA_1, - AIN2 = PA_2, - PWM0 = LED_RED, - PWM1 = LED_BLUE, - PWM2 = LED_GREEN, - GP2 = PE_5, // SD card Chip Select line. Could also be PD_2. - GP3 = PE_6, - SCK2 = PC_10, - MISO2 = PC_11, - MOSI2 = PC_12, - SCL2 = I2C1_SCL, - SDA2 = I2C1_SDA, - RX2 = UART2_RX, - TX2 = UART2_TX, - GP4 = PE_9, - GP5 = PE_10, //LCD-A0 - GP6 = PE_13, //LCD Reset - GP7 = PE_14, //LCD CS - GP8 = PE_15, - -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/system_clock.c deleted file mode 100644 index d0be666b9b1..00000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/system_clock.c +++ /dev/null @@ -1,196 +0,0 @@ -/* mbed Microcontroller Library -* Copyright (c) 2006-2017 ARM Limited -* SPDX-License-Identifier: Apache-2.0 - -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*/ - -/** - * This file configures the system clock as follows: - *----------------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | - * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 - * | 3- USE_PLL_HSI (internal 16 MHz clock) | - *----------------------------------------------------------------------------------- - * SYSCLK(MHz) | 180 | 168 - * AHBCLK (MHz) | 180 | 168 - * APB1CLK (MHz) | 45 | 42 - * APB2CLK (MHz) | 90 | 84 - * USB capable (48 MHz) | NO | YES (HSI calibration needed) - *----------------------------------------------------------------------------------- -**/ - -#include "stm32f4xx.h" -#include "mbed_error.h" - -// clock source is selected with CLOCK_SOURCE in json config -#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) -#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) -#define USE_PLL_HSI 0x2 // Use HSI internal clock - -#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) -uint8_t SetSysClock_PLL_HSE(uint8_t bypass); -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ - -#if ((CLOCK_SOURCE) & USE_PLL_HSI) -uint8_t SetSysClock_PLL_HSI(void); -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ - - -/** - * @brief Configures the System clock source, PLL Multiplier and Divider factors, - * AHB/APBx prescalers and Flash settings - * @note This function should be called only once the RCC clock configuration - * is reset to the default reset state (done in SystemInit() function). - * @param None - * @retval None - */ - -void SetSysClock(void) -{ -#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) - /* 1- Try to start with HSE and external clock */ - if (SetSysClock_PLL_HSE(1) == 0) -#endif - { -#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) - /* 2- If fail try to start with HSE and external xtal */ - if (SetSysClock_PLL_HSE(0) == 0) -#endif - { -#if ((CLOCK_SOURCE) & USE_PLL_HSI) - /* 3- If fail start with HSI clock */ - if (SetSysClock_PLL_HSI() == 0) -#endif - { - { - error("SetSysClock failed\n"); - } - } - } - } -} - -#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) -/******************************************************************************/ -/* PLL (clocked by HSE) used as System clock source */ -/******************************************************************************/ -uint8_t SetSysClock_PLL_HSE(uint8_t bypass) -{ - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_ClkInitTypeDef RCC_ClkInitStruct; - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - - // Enable HSE oscillator and activate PLL with HSE as source - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - if (bypass == 0) { - RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT - } else { - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN - } - - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLN = 336; -#else - RCC_OscInitStruct.PLL.PLLN = 360; -#endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - return 0; // FAIL - } - - // Activate the OverDrive to reach the 180 MHz Frequency - if (HAL_PWREx_EnableOverDrive() != HAL_OK) { - return 0; // FAIL - } - - // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 180 or 168 MHz - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 45 or 42 MHz - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 90 or 84 MHz - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { - return 0; // FAIL - } - - // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3); - - return 1; -} -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ - -#if ((CLOCK_SOURCE) & USE_PLL_HSI) -/******************************************************************************/ -/* PLL (clocked by HSI) used as System clock source */ -/******************************************************************************/ -uint8_t SetSysClock_PLL_HSI(void) -{ - RCC_OscInitTypeDef RCC_OscInitStruct; - RCC_ClkInitTypeDef RCC_ClkInitStruct; - - /* The voltage scaling allows optimizing the power consumption when the device is - clocked below the maximum system frequency, to update the voltage scaling value - regarding system frequency refer to product datasheet. */ - __HAL_RCC_PWR_CLK_ENABLE(); - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - - // Enable HSI oscillator and activate PLL with HSI as source - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.HSEState = RCC_HSE_OFF; - RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 8; -#if (CLOCK_SOURCE_USB) - RCC_OscInitStruct.PLL.PLLN = 168; -#else - RCC_OscInitStruct.PLL.PLLN = 180; -#endif - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if CLOCK_SOURCE_USB defined - RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if CLOCK_SOURCE_USB defined - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { - return 0; // FAIL - } - - // Activate the OverDrive to reach the 180 MHz Frequency - if (HAL_PWREx_EnableOverDrive() != HAL_OK) { - return 0; // FAIL - } - - /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 180 or 168 MHz - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 45 or 42 MHz - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 90 or 84 MHz - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { - return 0; // FAIL - } - - // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3); - - return 1; -} -#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ - diff --git a/targets/targets.json b/targets/targets.json index f146ddb837f..50e5e04dc42 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2128,50 +2128,6 @@ "0795" ] }, - "MTB_STM_S2LP": { - "inherits": [ - "MCU_STM32" - ], - "core": "Cortex-M4F", - "config": { - "clock_source": { - "help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (8MHz) | USE_PLL_HSI", - "value": "USE_PLL_HSE_XTAL", - "macro_name": "CLOCK_SOURCE" - }, - "clock_source_usb": { - "help": "As 48 Mhz clock is configured for USB, SYSCLK has to be reduced from 180 to 168 MHz (set 0 for the max SYSCLK value)", - "value": "1", - "macro_name": "CLOCK_SOURCE_USB" - } - }, - "extra_labels_add": [ - "STM32F4", - "STM32F429xI" - ], - "components_add": [ - "FLASHIAP" - ], - "macros_add": [ - "STM32F429xx" - ], - "device_has_add": [ - "ANALOGOUT", - "CAN", - "SERIAL_ASYNCH", - "TRNG", - "FLASH", - "MPU" - ], - "detect_code": [ - "0467" - ], - "device_name": "STM32F429ZI", - "bootloader_supported": true, - "overrides": { - "network-default-interface-type": "MESH" - } - }, "WIO_3G": { "inherits": [ "MCU_STM32" diff --git a/tools/test_configs/Wi-SUNInterface.json b/tools/test_configs/Wi-SUNInterface.json index 683f13ef370..1b11537ce70 100644 --- a/tools/test_configs/Wi-SUNInterface.json +++ b/tools/test_configs/Wi-SUNInterface.json @@ -42,9 +42,6 @@ }, "NUCLEO_F429ZI": { "s2lp.provide-default" : true - }, - "MTB_STM_S2LP": { - "s2lp.provide-default" : true } } } From 307cc61b8cd244392734698b00271ca78328e4ab Mon Sep 17 00:00:00 2001 From: Marcelo Salazar Date: Wed, 13 May 2020 20:15:56 +0100 Subject: [PATCH 2/2] Add legacy config support --- .../source/NanostackRfPhys2lp.cpp | 6 +- .../stm-s2lp-rf-driver/NanostackRfPhys2lp.h | 96 ++++++++++++------- 2 files changed, 67 insertions(+), 35 deletions(-) diff --git a/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp b/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp index ad8176b7eef..843d4c4fbda 100644 --- a/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp +++ b/components/802.15.4_RF/stm-s2lp-rf-driver/source/NanostackRfPhys2lp.cpp @@ -1423,10 +1423,10 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t * #if MBED_CONF_S2LP_PROVIDE_DEFAULT NanostackRfPhy &NanostackRfPhy::get_default_instance() { - static NanostackRfPhys2lp rf_phy(MBED_CONF_S2LP_SPI_SDI, MBED_CONF_S2LP_SPI_SDO, MBED_CONF_S2LP_SPI_SCLK, MBED_CONF_S2LP_SPI_CS, MBED_CONF_S2LP_SPI_SDN - , MBED_CONF_S2LP_SPI_GPIO0, MBED_CONF_S2LP_SPI_GPIO1, MBED_CONF_S2LP_SPI_GPIO2, MBED_CONF_S2LP_SPI_GPIO3 + static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN + , S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3 #ifdef AT24MAC - , MBED_CONF_S2LP_I2C_SDA, MBED_CONF_S2LP_I2C_SCL + , S2LP_I2C_SDA, S2LP_I2C_SCL #endif //AT24MAC ); return rf_phy; diff --git a/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h b/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h index 6dcd0995ff4..d092c106237 100644 --- a/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h +++ b/components/802.15.4_RF/stm-s2lp-rf-driver/stm-s2lp-rf-driver/NanostackRfPhys2lp.h @@ -25,68 +25,100 @@ #include "InterruptIn.h" #include "SPI.h" -#if !defined(MBED_CONF_S2LP_SPI_SDI) -#define MBED_CONF_S2LP_SPI_SDI D11 +#if defined(MBED_CONF_S2LP_SPI_SDI) +#define S2LP_SPI_SDI MBED_CONF_S2LP_SPI_SDI +#else +#define S2LP_SPI_SDI D11 #endif -#if !defined(MBED_CONF_S2LP_SPI_SDO) -#define MBED_CONF_S2LP_SPI_SDO D12 +#if defined(MBED_CONF_S2LP_SPI_SDO) +#define S2LP_SPI_SDO MBED_CONF_S2LP_SPI_SDO +#else +#define S2LP_SPI_SDO D12 #endif -#if !defined(MBED_CONF_S2LP_SPI_SCLK) -#define MBED_CONF_S2LP_SPI_SCLK D13 +#if defined(MBED_CONF_S2LP_SPI_SCLK) +#define S2LP_SPI_SCLK MBED_CONF_S2LP_SPI_SCLK +#else +#define S2LP_SPI_SCLK D13 #endif -#if !defined(MBED_CONF_S2LP_SPI_CS) -#define MBED_CONF_S2LP_SPI_CS A1 +#if defined(MBED_CONF_S2LP_SPI_CS) +#define S2LP_SPI_CS MBED_CONF_S2LP_SPI_CS +#else +#define S2LP_SPI_CS A1 #endif -#if !defined(MBED_CONF_S2LP_SPI_SDN) -#define MBED_CONF_S2LP_SPI_SDN D7 +#if defined(MBED_CONF_S2LP_SPI_SDN) +#define S2LP_SPI_SDN MBED_CONF_S2LP_SPI_SDN +#else +#define S2LP_SPI_SDN D7 #endif -#if !defined(MBED_CONF_S2LP_TEST_PIN_TX) -#define MBED_CONF_S2LP_TEST_PIN_TX D6 +#if defined(MBED_CONF_S2LP_TEST_PIN_TX) +#define S2LP_TEST_PIN_TX MBED_CONF_S2LP_TEST_PIN_TX +#else +#define S2LP_TEST_PIN_TX D6 #endif -#if !defined(MBED_CONF_S2LP_TEST_PIN_RX) -#define MBED_CONF_S2LP_TEST_PIN_RX D5 +#if defined(MBED_CONF_S2LP_TEST_PIN_RX) +#define S2LP_TEST_PIN_RX MBED_CONF_S2LP_TEST_PIN_RX +#else +#define S2LP_TEST_PIN_RX D5 #endif -#if !defined(TMBED_CONF_S2LP_TEST_PIN_CSMA) -#define MBED_CONF_S2LP_TEST_PIN_CSMA D4 +#if defined(TMBED_CONF_S2LP_TEST_PIN_CSMA) +#define S2LP_TEST_PIN_CSMA TMBED_CONF_S2LP_TEST_PIN_CSMA +#else +#define S2LP_TEST_PIN_CSMA D4 #endif -#if !defined(MBED_CONF_S2LP_TEST_PIN_SPARE_1) -#define MBED_CONF_S2LP_TEST_PIN_SPARE_1 D2 +#if defined(MBED_CONF_S2LP_TEST_PIN_SPARE_1) +#define S2LP_TEST_PIN_SPARE_1 MBED_CONF_S2LP_TEST_PIN_SPARE_1 +#else +#define S2LP_TEST_PIN_SPARE_1 D2 #endif -#if !defined(MBED_CONF_S2LP_TEST_PIN_SPARE_2) -#define MBED_CONF_S2LP_TEST_PIN_SPARE_2 D8 +#if defined(MBED_CONF_S2LP_TEST_PIN_SPARE_2) +#define S2LP_TEST_PIN_SPARE_2 DMBED_CONF_S2LP_TEST_PIN_SPARE_2 +#else +#define S2LP_TEST_PIN_SPARE_2 D8 #endif -#if !defined(MBED_CONF_S2LP_SPI_GPIO0) -#define MBED_CONF_S2LP_SPI_GPIO0 A0 +#if defined(MBED_CONF_S2LP_SPI_GPIO0) +#define S2LP_SPI_GPIO0 MBED_CONF_S2LP_SPI_GPIO0 +#else +#define S2LP_SPI_GPIO0 A0 #endif -#if !defined(MBED_CONF_S2LP_SPI_GPIO1) -#define MBED_CONF_S2LP_SPI_GPIO1 A2 +#if defined(MBED_CONF_S2LP_SPI_GPIO1) +#define S2LP_SPI_GPIO1 MBED_CONF_S2LP_SPI_GPIO1 +#else +#define S2LP_SPI_GPIO1 A2 #endif -#if !defined(MBED_CONF_S2LP_SPI_GPIO2) -#define MBED_CONF_S2LP_SPI_GPIO2 A3 +#if defined(MBED_CONF_S2LP_SPI_GPIO2) +#define S2LP_SPI_GPIO2 MBED_CONF_S2LP_SPI_GPIO2 +#else +#define S2LP_SPI_GPIO2 A3 #endif -#if !defined(MBED_CONF_S2LP_SPI_GPIO3) -#define MBED_CONF_S2LP_SPI_GPIO3 A5 +#if defined(MBED_CONF_S2LP_SPI_GPIO3) +#define S2LP_SPI_GPIO3 MBED_CONF_S2LP_SPI_GPIO3 +#else +#define S2LP_SPI_GPIO3 A5 #endif -#if !defined(MBED_CONF_S2LP_I2C_SDA) -#define MBED_CONF_S2LP_I2C_SDA null +#if defined(MBED_CONF_S2LP_I2C_SDA) +#define S2LP_I2C_SDA MBED_CONF_S2LP_I2C_SDA +#else +#define S2LP_I2C_SDA null #endif -#if !defined(MBED_CONF_S2LP_I2C_SCL) -#define MBED_CONF_S2LP_I2C_SCL null +#if defined(MBED_CONF_S2LP_I2C_SCL) +#define S2LP_I2C_SCL MBED_CONF_S2LP_I2C_SCL +#else +#define S2LP_I2C_SCL null #endif #include "at24mac_s2lp.h"