diff --git a/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbedtls_device.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbedtls_device.h
new file mode 100644
index 00000000000..7f0f6c81424
--- /dev/null
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbedtls_device.h
@@ -0,0 +1,30 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2015-2016 Nuvoton
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBEDTLS_DEVICE_H
+#define MBEDTLS_DEVICE_H
+
+#define MBEDTLS_DES_ALT
+
+#define MBEDTLS_SHA1_ALT
+#define MBEDTLS_SHA256_ALT
+
+#define MBEDTLS_AES_ALT
+#define MBEDTLS_AES_SETKEY_ENC_ALT
+#define MBEDTLS_AES_SETKEY_DEC_ALT
+#define MBEDTLS_AES_ENCRYPT_ALT
+#define MBEDTLS_AES_DECRYPT_ALT
+
+#endif /* MBEDTLS_DEVICE_H */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.c
similarity index 99%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.c
index 82def0d1ee1..a86c0cb9e39 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.c
@@ -21,9 +21,6 @@
  *  http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -591,5 +588,3 @@ int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
 
 
 #endif /* MBEDTLS_AES_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.h
similarity index 97%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.h
index 25a8ca53116..d46ef6d16e3 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/aes/aes_alt.h
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/aes/aes_alt.h
@@ -21,6 +21,16 @@
  *  This file is part of mbed TLS (https://tls.mbed.org)
  */
 
+#ifndef MBEDTLS_AES_ALT_H
+#define MBEDTLS_AES_ALT_H
+
+#if !defined(MBEDTLS_CONFIG_FILE)
+#include "mbedtls/config.h"
+#else
+#include MBEDTLS_CONFIG_FILE
+#endif
+
+#if defined(MBEDTLS_AES_C)
 #if defined(MBEDTLS_AES_ALT)
 // Regular implementation
 //
@@ -270,5 +280,6 @@ void mbedtls_aes_decrypt( mbedtls_aes_context *ctx,
 
 
 #endif /* MBEDTLS_AES_ALT */
+#endif /* MBEDTLS_AES_C */
 
-
+#endif /* aes_alt.h */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/crypto-misc.c
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/crypto-misc.c
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/crypto-misc.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/crypto-misc.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/crypto-misc.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.c
similarity index 98%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.c
index 86d12a27cff..e4e9fd4023d 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.c
@@ -14,9 +14,6 @@
  * limitations under the License.
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -348,7 +345,7 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
     
     uint32_t rmn = length;
     const unsigned char *in_pos = input;
-    const unsigned char *out_pos = output;
+    unsigned char *out_pos = output;
     
     while (rmn) {
         uint32_t data_len = (rmn <= MAXSIZE_DMABUF) ? rmn : MAXSIZE_DMABUF;
@@ -411,5 +408,3 @@ static int mbedtls_des_docrypt(uint16_t keyopt, uint8_t key[3][MBEDTLS_DES_KEY_S
 
 #endif /* MBEDTLS_DES_ALT */
 #endif /* MBEDTLS_DES_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.h
similarity index 99%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.h
index 4676ab93e12..b783889d538 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt.h
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt.h
@@ -23,6 +23,7 @@
 #include MBEDTLS_CONFIG_FILE
 #endif
 
+#if defined(MBEDTLS_DES_C)
 #if defined(MBEDTLS_DES_ALT)
 
 #include <stddef.h>
@@ -276,5 +277,6 @@ void mbedtls_des_setkey( uint32_t SK[32],
 #endif
 
 #endif /* MBEDTLS_DES_ALT */
+#endif /* MBEDTLS_DES_C */
 
 #endif /* des_alt.h */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt_sw.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt_sw.c
similarity index 99%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt_sw.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt_sw.c
index 59a94d0164e..1e51151c862 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt_sw.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt_sw.c
@@ -25,9 +25,6 @@
  *  http://csrc.nist.gov/publications/fips/fips46-3/fips46-3.pdf
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -798,5 +795,3 @@ int mbedtls_des3_sw_crypt_cbc( mbedtls_des3_sw_context *ctx,
 
 #endif /* MBEDTLS_DES_ALT */
 #endif /* MBEDTLS_DES_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt_sw.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt_sw.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/des/des_alt_sw.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/des/des_alt_sw.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c
similarity index 96%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c
index dfa8cda864a..de6ff01415c 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.c
@@ -14,9 +14,6 @@
  * limitations under the License.
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -139,5 +136,3 @@ void mbedtls_sha1_process(mbedtls_sha1_context *ctx, const unsigned char data[64
 
 #endif /* MBEDTLS_SHA1_ALT */
 #endif /* MBEDTLS_SHA1_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt_sw.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt_sw.c
similarity index 98%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt_sw.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt_sw.c
index 18b0c496c6e..230c872465d 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt_sw.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt_sw.c
@@ -24,9 +24,6 @@
  *  http://www.itl.nist.gov/fipspubs/fip180-1.htm
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -346,5 +343,3 @@ void mbedtls_sha1_sw_finish( mbedtls_sha1_sw_context *ctx, unsigned char output[
 #endif /* MBEDTLS_SHA1_ALT */
 
 #endif /* MBEDTLS_SHA1_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt_sw.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt_sw.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha1_alt_sw.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha1_alt_sw.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c
similarity index 96%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c
index f62f0e28104..e5fd727e2a7 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.c
@@ -14,9 +14,6 @@
  * limitations under the License.
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -140,5 +137,3 @@ void mbedtls_sha256_process(mbedtls_sha256_context *ctx, const unsigned char dat
 
 #endif /* MBEDTLS_SHA256_ALT */
 #endif /* MBEDTLS_SHA256_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt_sw.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt_sw.c
similarity index 98%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt_sw.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt_sw.c
index a6db9b136bc..3ac2b613173 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt_sw.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt_sw.c
@@ -24,9 +24,6 @@
  *  http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -320,5 +317,3 @@ void mbedtls_sha256_sw_finish( mbedtls_sha256_sw_context *ctx, unsigned char out
 #endif /* MBEDTLS_SHA256_ALT */
 
 #endif /* MBEDTLS_SHA256_C */
-
-#endif /* MBED_CONF_RTOS_PRESENT */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt_sw.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt_sw.h
similarity index 100%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha256_alt_sw.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha256_alt_sw.h
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.c b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.c
similarity index 97%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.c
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.c
index 2eb75369593..b34bcd7f876 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.c
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.c
@@ -14,9 +14,6 @@
  * limitations under the License.
  */
 
-/* Compatible with mbed OS 2 which doesn't support mbedtls */
-#if MBED_CONF_RTOS_PRESENT
-
 #if !defined(MBEDTLS_CONFIG_FILE)
 #include "mbedtls/config.h"
 #else
@@ -51,6 +48,7 @@ void crypto_sha_getinternstate(unsigned char output[], size_t olen);
 
 #endif /* MBEDTLS_SHA1_ALT || MBEDTLS_SHA256_ALT || MBEDTLS_SHA512_ALT */
 
+#if defined(MBEDTLS_SHA1_C)
 #if defined(MBEDTLS_SHA1_ALT)
 
 void mbedtls_sha1_hw_init(crypto_sha_context *ctx)
@@ -123,7 +121,9 @@ void mbedtls_sha1_hw_process(crypto_sha_context *ctx, const unsigned char data[6
 }
 
 #endif /* MBEDTLS_SHA1_ALT */
+#endif /* MBEDTLS_SHA1_C */
 
+#if defined(MBEDTLS_SHA256_C)
 #if defined(MBEDTLS_SHA256_ALT)
 
 void mbedtls_sha256_hw_init(crypto_sha_context *ctx)
@@ -197,7 +197,9 @@ void mbedtls_sha256_hw_process(crypto_sha_context *ctx, const unsigned char data
 }
 
 #endif /* MBEDTLS_SHA256_ALT */
+#endif /* MBEDTLS_SHA256_C */
 
+#if defined(MBEDTLS_SHA1_C) || defined(MBEDTLS_SHA256_C) || defined(MBEDTLS_SHA512_C)
 #if defined(MBEDTLS_SHA1_ALT) || defined(MBEDTLS_SHA256_ALT) || defined(MBEDTLS_SHA512_ALT)
 
 void crypto_sha_update(crypto_sha_context *ctx, const unsigned char *input, size_t ilen)
@@ -332,7 +334,6 @@ void crypto_sha_getinternstate(unsigned char output[], size_t olen)
 }
 
 #endif /* MBEDTLS_SHA1_ALT || MBEDTLS_SHA256_ALT || MBEDTLS_SHA512_ALT */
-
 #endif /* MBEDTLS_SHA1_C || MBEDTLS_SHA256_C || MBEDTLS_SHA512_C */
 
-#endif /* MBED_CONF_RTOS_PRESENT */
+#endif /* MBEDTLS_SHA1_C || MBEDTLS_SHA256_C || MBEDTLS_SHA512_C */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.h b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.h
similarity index 91%
rename from targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.h
rename to features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.h
index fb423ca71eb..6ee7da14df8 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/crypto/sha/sha_alt_hw.h
+++ b/features/mbedtls/targets/TARGET_NUVOTON/TARGET_NUC472/sha/sha_alt_hw.h
@@ -23,6 +23,7 @@
 #endif
 
 #if defined(MBEDTLS_SHA1_C) || defined(MBEDTLS_SHA256_C) || defined(MBEDTLS_SHA512_C)
+#if defined(MBEDTLS_SHA1_ALT) || defined(MBEDTLS_SHA256_ALT) || defined(MBEDTLS_SHA512_ALT)
 
 #include <stddef.h>
 #include <stdint.h>
@@ -50,6 +51,7 @@ void crypto_sha_update(crypto_sha_context *ctx, const unsigned char *input, size
 void crypto_sha_update_nobuf(crypto_sha_context *ctx, const unsigned char *input, size_t ilen, int islast);
 void crypto_sha_getinternstate(unsigned char output[], size_t olen);
 
+#if defined(MBEDTLS_SHA1_C)
 #if defined(MBEDTLS_SHA1_ALT)
 
 void mbedtls_sha1_hw_init( crypto_sha_context *ctx );
@@ -62,7 +64,9 @@ void mbedtls_sha1_hw_finish( crypto_sha_context *ctx, unsigned char output[20] )
 void mbedtls_sha1_hw_process( crypto_sha_context *ctx, const unsigned char data[64] );
 
 #endif /* MBEDTLS_SHA1_ALT */
+#endif /* MBEDTLS_SHA1_C */
 
+#if defined(MBEDTLS_SHA256_C)
 #if defined(MBEDTLS_SHA256_ALT)
 
 void mbedtls_sha256_hw_init( crypto_sha_context *ctx );
@@ -76,11 +80,13 @@ void mbedtls_sha256_hw_finish( crypto_sha_context *ctx, unsigned char output[32]
 void mbedtls_sha256_hw_process( crypto_sha_context *ctx, const unsigned char data[64] );
 
 #endif /* MBEDTLS_SHA256_ALT */
+#endif /* MBEDTLS_SHA256_C */
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* MBEDTLS_SHA1_C || MBEDTLS_SHA256_C || MBEDTLS_SHA512_C*/
+#endif /* MBEDTLS_SHA1_ALT || MBEDTLS_SHA256_ALT || MBEDTLS_SHA512_ALT */
+#endif /* MBEDTLS_SHA1_C || MBEDTLS_SHA256_C || MBEDTLS_SHA512_C */
 
 #endif /* sha_alt.h */
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h b/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h
index dd10d034cfe..8712c3faa8e 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h
+++ b/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h
@@ -115,7 +115,7 @@ typedef enum {
     LED1 = PD_2,
     LED2 = PD_3,
     LED3 = PD_7,
-    LED4 = D0,  // No real LED. Just for passing ATS.
+    LED4 = LED1,    // No real LED. Just for passing ATS.
     LED_RED = LED2,
     LED_GREEN = LED3,
     LED_BLUE = LED1,
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/mbed_overrides.c b/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/mbed_overrides.c
index af1e63fbe41..d98873577df 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/mbed_overrides.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/mbed_overrides.c
@@ -16,14 +16,6 @@
 
 #include "analogin_api.h"
 
-// NOTE: Ensurce mbed_sdk_init() will get called before C++ global object constructor.
-#if defined(__CC_ARM) || defined(__GNUC__)
-void mbed_sdk_init_forced(void) __attribute__((constructor(101)));
-#elif defined(__ICCARM__)
-    // FIXME: How to achieve it in IAR?
-#endif
-
-
 void mbed_sdk_init(void)
 {
     // NOTE: Support singleton semantics to be called from other init functions
@@ -75,8 +67,3 @@ void mbed_sdk_init(void)
     /* Lock protected registers */
     SYS_LockReg();
 }
-
-void mbed_sdk_init_forced(void)
-{
-    mbed_sdk_init();
-}
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
index 04fab3eee8f..588f1e02db7 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
+++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
@@ -9,7 +9,7 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
 define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_IRAM_end__   = 0x20008000;
+define symbol __ICFEDIT_region_IRAM_end__   = 0x20008000 - 1;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
 define symbol __ICFEDIT_size_heap__   = 0x4000;
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/startup_M451Series.c b/targets/TARGET_NUVOTON/TARGET_M451/device/startup_M451Series.c
index 086c9af6976..a7852ec676f 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/device/startup_M451Series.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/device/startup_M451Series.c
@@ -61,12 +61,11 @@ extern uint32_t __bss_start__;
 extern uint32_t __bss_end__;
 
 extern void uvisor_init(void);
-//#if defined(TOOLCHAIN_GCC_ARM)
-//extern void _start(void);
-//#endif
-extern void software_init_hook(void) __attribute__((weak));
-extern void __libc_init_array(void);
-extern int main(void);
+#if defined(TOOLCHAIN_GCC_ARM)
+extern void _start(void);
+#else
+#error("For GCC toolchain, only support GNU ARM Embedded")
+#endif
 #endif
 
 /* Default empty handler */
@@ -271,14 +270,15 @@ void Reset_Handler(void)
     /* HXT Crystal Type Select: INV */
     CLK->PWRCTL &= ~CLK_PWRCTL_HXTSELTYP_Msk;
     
-    /* Enable register write-protection function */
-    SYS_LockReg();
-    
     /**
-     * Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start.
+     * NOTE 1: Unlock is required for perhaps some register access in SystemInit().
+     * NOTE 2: Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start.
      */
     SystemInit();
     
+    /* Enable register write-protection function */
+    SYS_LockReg();
+
 #if defined(__CC_ARM)
     __main();
     
@@ -306,19 +306,8 @@ void Reset_Handler(void)
         }
     }
     
-    //uvisor_init();
+    _start();
     
-    if (software_init_hook) {
-        /**
-         * Give control to the RTOS via software_init_hook() which will also call __libc_init_array().
-         * Assume software_init_hook() is defined in libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h.
-         */
-        software_init_hook();
-    }
-    else {
-        __libc_init_array();
-        main();
-    }
 #endif
 
     /* Infinite loop */
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/gpio_irq_api.c b/targets/TARGET_NUVOTON/TARGET_M451/gpio_irq_api.c
index 7ced1ebf828..b9aaca3f0e5 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/gpio_irq_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/gpio_irq_api.c
@@ -52,23 +52,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
 
 #define NU_MAX_PORT     (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
 
-#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
-#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE 0
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE 0
 #endif
 
-#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
-#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
 #endif
 static PinName gpio_irq_debounce_arr[] = {
-    MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
+    MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
 };
 
-#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
-#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_LIRC
 #endif
 
-#ifndef MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
-#define MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
 #endif
 
 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
@@ -88,15 +88,16 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
     obj->irq_id = id;
 
     GPIO_T *gpio_base = NU_PORT_BASE(port_index);
+    // NOTE: In InterruptIn constructor, gpio_irq_init() is called with gpio_init_in() which is responsible for multi-function pin setting.
     //gpio_set(pin);
     
     {
-#if MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_ENABLE
+#if MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
         // Suppress compiler warning
         (void) gpio_irq_debounce_arr;
 
         // Configure de-bounce clock source and sampling cycle time
-        GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
+        GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
         GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
 #else
         // Enable de-bounce if the pin is in the de-bounce enable list
@@ -113,7 +114,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
             if (pin_index == pin_index_debunce &&
                 port_index == port_index_debounce) {
                 // Configure de-bounce clock source and sampling cycle time
-                GPIO_SET_DEBOUNCE_TIME(MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_M451_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
+                GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
                 GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
                 break;
             }
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c b/targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c
index ae0bde44539..b4b68b5ab8c 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/lp_ticker.c
@@ -138,7 +138,7 @@ timestamp_t lp_ticker_read()
         while (minor_clks == 0 || minor_clks == TMR2_CLK_PER_TMR2_INT);
 
         // Add power-down compensation
-        return ((uint64_t) major_minor_clks * US_PER_SEC / TMR3_CLK_PER_SEC / US_PER_TICK);
+        return ((uint64_t) major_minor_clks * US_PER_SEC / TMR2_CLK_PER_SEC / US_PER_TICK);
     }
     while (0);
 }
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/mbed_lib.json b/targets/TARGET_NUVOTON/TARGET_M451/mbed_lib.json
deleted file mode 100644
index cfa14e99b08..00000000000
--- a/targets/TARGET_NUVOTON/TARGET_M451/mbed_lib.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
-    "name": "M451",
-    "config": {
-        "gpio-irq-debounce-enable": {
-            "help": "Enable GPIO IRQ debounce",
-            "value": 0
-        },
-        "gpio-irq-debounce-enable-list": {
-            "help": "Comma separated pin list to enable GPIO IRQ debounce",
-            "value": "NC"
-        },
-        "gpio-irq-debounce-clock-source": {
-            "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
-            "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
-        },
-
-        "gpio-irq-debounce-sample-rate": {
-            "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
-            "value": "GPIO_DBCTL_DBCLKSEL_16"
-        }
-    }
-}
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/rtc_api.c b/targets/TARGET_NUVOTON/TARGET_M451/rtc_api.c
index 906604c1a8d..292adcf8938 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/rtc_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/rtc_api.c
@@ -26,31 +26,33 @@
 
 #define YEAR0       1900
 //#define EPOCH_YR    1970
-static int rtc_inited = 0;
 
 static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL};
 
 void rtc_init(void)
 {
-    if (rtc_inited) {
+    if (rtc_isenabled()) {
         return;
     }
-    rtc_inited = 1;
-    
-    // Enable IP clock
-    CLK_EnableModuleClock(rtc_modinit.clkidx);
     
     RTC_Open(NULL);
 }
 
 void rtc_free(void)
 {
-    // FIXME
+    // N/A
 }
 
 int rtc_isenabled(void)
 {
-    return rtc_inited;
+    // NOTE: To access (RTC) registers, clock must be enabled first.
+    if (! (CLK->APBCLK0 & CLK_APBCLK0_RTCCKEN_Msk)) {
+        // Enable IP clock
+        CLK_EnableModuleClock(rtc_modinit.clkidx);
+    }
+    
+    // NOTE: Check RTC Init Active flag to support crossing reset cycle.
+    return  !! (RTC->INIT & RTC_INIT_ACTIVE_Msk);
 }
 
 /*
@@ -68,7 +70,9 @@ int rtc_isenabled(void)
 
 time_t rtc_read(void)
 {
-    if (! rtc_inited) {
+    // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency.
+    //       RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect.
+    if (! rtc_isenabled()) {
         rtc_init();
     }
     
@@ -94,7 +98,7 @@ time_t rtc_read(void)
 
 void rtc_write(time_t t)
 {
-    if (! rtc_inited) {
+    if (! rtc_isenabled()) {
         rtc_init();
     }
     
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c b/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c
index 4fa7e7a47ac..b0965477c70 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c
@@ -269,7 +269,11 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
-    // TODO: Assert for not supported parity and data bits
+    // Sanity check arguments    
+    MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
+    MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || (parity == ParityForced1) || (parity == ParityForced0));
+    MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
+    
     obj->serial.databits = data_bits;
     obj->serial.parity = parity;
     obj->serial.stopbits = stop_bits;
diff --git a/targets/TARGET_NUVOTON/TARGET_M451/spi_api.c b/targets/TARGET_NUVOTON/TARGET_M451/spi_api.c
index dce76615845..5616bd60cc6 100644
--- a/targets/TARGET_NUVOTON/TARGET_M451/spi_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M451/spi_api.c
@@ -573,7 +573,7 @@ static uint32_t spi_event_check(spi_t *obj)
     // Receive Time-Out
     if (spi_base->STATUS & SPI_STATUS_RXTOIF_Msk) {
         spi_base->STATUS = SPI_STATUS_RXTOIF_Msk;
-        //event |= SPI_EVENT_ERROR;
+        // Not using this IF. Just clear it.
     }
     // Transmit FIFO Under-Run
     if (spi_base->STATUS & SPI_STATUS_TXUFIF_Msk) {
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PinNames.h b/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PinNames.h
index 7e874f327ba..4715ef11b24 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PinNames.h
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PinNames.h
@@ -118,7 +118,7 @@ typedef enum {
     LED1 = PD_9,
     LED2 = PA_4,
     LED3 = PD_8,
-    LED4 = D0,  // No real LED. Just for passing ATS.
+    LED4 = LED1,    // No real LED. Just for passing ATS.
     LED_RED = LED1,
     LED_GREEN = LED2,
     LED_BLUE = LED3,
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbed_overrides.c b/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbed_overrides.c
index 3316802238b..143d0e8a74c 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbed_overrides.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/mbed_overrides.c
@@ -17,13 +17,6 @@
 #include "cmsis.h"
 #include "analogin_api.h"
 
-// NOTE: Ensurce mbed_sdk_init() will get called before C++ global object constructor.
-#if defined(__CC_ARM) || defined(__GNUC__)
-void mbed_sdk_init_forced(void) __attribute__((constructor(101)));
-#elif defined(__ICCARM__)
-    // FIXME: How to achieve it in IAR?
-#endif
-
 void mbed_sdk_init(void)
 {
     // NOTE: Support singleton semantics to be called from other init functions
@@ -88,8 +81,3 @@ void mbed_sdk_init(void)
     /* Lock protected registers */
     SYS_LockReg();
 }
-
-void mbed_sdk_init_forced(void)
-{
-    mbed_sdk_init();
-}
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.c b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.c
index b611d17aea3..a5bda85503b 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.c
@@ -1,8 +1,8 @@
 /****************************************************************************//**
  * @file     spi.c
  * @version  V0.10
- * $Revision: 15 $
- * $Date: 14/09/30 1:10p $
+ * $Revision: 16 $
+ * $Date: 15/06/18 4:00p $
  * @brief    NUC472/NUC442 SPI driver source file
  *
  * @note
@@ -102,7 +102,7 @@ void SPI_ClearTxFIFO(SPI_T *spi)
   */
 void SPI_DisableAutoSS(SPI_T *spi)
 {
-    spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
+    spi->SSCTL &= ~(SPI_SSCTL_AUTOSS_Msk | SPI_SSCTL_SS_Msk);
 }
 
 /**
@@ -118,7 +118,7 @@ void SPI_DisableAutoSS(SPI_T *spi)
   */
 void SPI_EnableAutoSS(SPI_T *spi, uint32_t u32SSPinMask, uint32_t u32ActiveLevel)
 {
-    spi->SSCTL |= (u32SSPinMask | u32ActiveLevel) | SPI_SSCTL_AUTOSS_Msk;
+    spi->SSCTL = (spi->SSCTL & ~(SPI_SSCTL_SSACTPOL_Msk | SPI_SSCTL_SS_Msk)) | (u32SSPinMask | u32ActiveLevel) | SPI_SSCTL_AUTOSS_Msk;
 }
 
 /**
@@ -153,12 +153,15 @@ uint32_t SPI_SetBusClock(SPI_T *spi, uint32_t u32BusClock)
             u32ClkSrc = CLK_GetPLLClockFreq();
     }
 
+    if(u32BusClock > u32ClkSrc)
+        u32BusClock = u32ClkSrc;
 
     if(u32BusClock != 0 ) {
         u32Div = (u32ClkSrc / u32BusClock) - 1;
         if(u32Div > SPI_CLKDIV_DIVIDER_Msk)
             u32Div = SPI_CLKDIV_DIVIDER_Msk;
-    }
+    } else
+        return 0;
 
     spi->CLKDIV = (spi->CLKDIV & ~SPI_CLKDIV_DIVIDER_Msk) | u32Div;
 
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.h b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.h
index 0586e9e5588..39d4a352564 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.h
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_spi.h
@@ -1,8 +1,8 @@
 /****************************************************************************//**
  * @file     spi.h
  * @version  V1.00
- * $Revision: 18 $
- * $Date: 14/10/06 1:36p $
+ * $Revision: 21 $
+ * $Date: 15/06/18 4:12p $
  * @brief    NUC472/NUC442 SPI driver header file
  *
  * @note
@@ -31,8 +31,8 @@ extern "C"
 
 #define SPI_MODE_0        (SPI_CTL_TXNEG_Msk)                             /*!< CLKP=0; RX_NEG=0; TX_NEG=1 \hideinitializer */
 #define SPI_MODE_1        (SPI_CTL_RXNEG_Msk)                             /*!< CLKP=0; RX_NEG=1; TX_NEG=0 \hideinitializer */
-#define SPI_MODE_2        (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)        /*!< CLKP=1; RX_NEG=1; TX_NEG=0 \hideinitializer */
-#define SPI_MODE_3        (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)        /*!< CLKP=1; RX_NEG=0; TX_NEG=1 \hideinitializer */
+#define SPI_MODE_2        (SPI_CTL_CLKPOL_Msk | SPI_CTL_RXNEG_Msk)        /*!< CLKP=1; RX_NEG=1; TX_NEG=0 \hideinitializer */
+#define SPI_MODE_3        (SPI_CTL_CLKPOL_Msk | SPI_CTL_TXNEG_Msk)        /*!< CLKP=1; RX_NEG=0; TX_NEG=1 \hideinitializer */
 
 #define SPI_SLAVE         (SPI_CTL_SLAVE_Msk)                             /*!< Set as slave \hideinitializer */
 #define SPI_MASTER        (0x0)                                           /*!< Set as master \hideinitializer */
@@ -70,7 +70,7 @@ extern "C"
   * @return none
   * \hideinitializer
   */
-#define SPI_SET_SLAVE_TIMEOUT_PERIOD(spi, u32TimeoutPeriod) ( (spi)->SSCTL = ((spi)->SSCTL & ~SPI_SSCTL_SLVTOCNT_Msk) | (u32TimeoutPeriod & 0xFFFF) )
+#define SPI_SET_SLAVE_TIMEOUT_PERIOD(spi, u32TimeoutPeriod) ( (spi)->SSCTL = ((spi)->SSCTL & ~SPI_SSCTL_SLVTOCNT_Msk) | (((uint32_t)u32TimeoutPeriod & 0xFFFF) << SPI_SSCTL_SLVTOCNT_Pos) )
 
 /**
   * @brief  Enable time out clear function for FIFO mode.
@@ -194,56 +194,41 @@ extern "C"
 #define SPI_WRITE_TX(spi, u32TxData) ( (spi)->TX = u32TxData )
 
 /**
-  * @brief  Disable automatic slave select function and set SPI_SS pin to high state.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
+  * @brief      Set SPIn_SS0 pin to high state.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Disable automatic slave selection function and set SPIn_SS0 pin to high state. Only available in Master mode.
   * \hideinitializer
   */
-static __INLINE void SPI_SET_SS0_HIGH(SPI_T *spi)
-{
-    spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
-    spi->SSCTL |= SPI_SSCTL_SSACTPOL_Msk;
-    spi->SSCTL = (spi->SSCTL & ~SPI_SSCTL_SS_Msk) | SPI_SS0;
-}
+#define SPI_SET_SS0_HIGH(spi)   ((spi)->SSCTL = ((spi)->SSCTL & ~(SPI_SSCTL_AUTOSS_Msk|SPI_SSCTL_SSACTPOL_Msk|SPI_SS0)))
 
 /**
-  * @brief  Disable automatic slave select function and set SPI_SS pin to low state.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
+  * @brief      Set SPIn_SS0 pin to low state.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Disable automatic slave selection function and set SPIn_SS0 pin to low state. Only available in Master mode.
   * \hideinitializer
   */
-static __INLINE void SPI_SET_SS0_LOW(SPI_T *spi)
-{
-    spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
-    spi->SSCTL &= ~SPI_SSCTL_SSACTPOL_Msk;
-    spi->SSCTL = (spi->SSCTL & ~SPI_SSCTL_SS_Msk) | SPI_SS0;
-}
+#define SPI_SET_SS0_LOW(spi)   ((spi)->SSCTL = ((spi)->SSCTL & ~(SPI_SSCTL_AUTOSS_Msk|SPI_SSCTL_SSACTPOL_Msk|SPI_SS0)) | SPI_SS0)
 
 /**
-  * @brief  Disable automatic slave select function and set SPI_SS pin to high state.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
+  * @brief      Set SPIn_SS1 pin to high state.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Disable automatic slave selection function and set SPIn_SS1 pin to high state. Only available in Master mode.
   * \hideinitializer
   */
-static __INLINE void SPI_SET_SS1_HIGH(SPI_T *spi)
-{
-    spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
-    spi->SSCTL |= SPI_SSCTL_SSACTPOL_Msk;
-    spi->SSCTL = (spi->SSCTL & ~SPI_SSCTL_SS_Msk) | SPI_SS1;
-}
+#define SPI_SET_SS1_HIGH(spi)   ((spi)->SSCTL = ((spi)->SSCTL & ~(SPI_SSCTL_AUTOSS_Msk|SPI_SSCTL_SSACTPOL_Msk|SPI_SS1)))
 
 /**
-  * @brief  Disable automatic slave select function and set SPI_SS pin to low state.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
+  * @brief      Set SPIn_SS1 pin to low state.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Disable automatic slave selection function and set SPIn_SS1 pin to low state. Only available in Master mode.
   * \hideinitializer
   */
-static __INLINE void SPI_SET_SS1_LOW(SPI_T *spi)
-{
-    spi->SSCTL &= ~SPI_SSCTL_AUTOSS_Msk;
-    spi->SSCTL |= SPI_SSCTL_SSACTPOL_Msk;
-    spi->SSCTL = (spi->SSCTL & ~SPI_SSCTL_SS_Msk) | SPI_SS1;
-}
+#define SPI_SET_SS1_LOW(spi)   ((spi)->SSCTL = ((spi)->SSCTL & ~(SPI_SSCTL_AUTOSS_Msk|SPI_SSCTL_SSACTPOL_Msk|SPI_SS1)) | SPI_SS1)
+
 
 /**
   * @brief Enable byte reorder function.
@@ -341,14 +326,6 @@ static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
   */
 #define SPI_DISABLE(spi) (  (spi)->CTL &= ~SPI_CTL_SPIEN_Msk )
 
-/**
-  * @brief  Enable SPI Dual IO function.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
-  * \hideinitializer
-  */
-#define SPI_ENABLE_DUAL_MODE(spi) ( (spi)->CTL |= SPI_CTL_DUALIOEN_Msk )
-
 /**
   * @brief  Disable SPI Dual IO function.
   * @param[in]  spi is the base address of SPI module.
@@ -358,28 +335,20 @@ static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
 #define SPI_DISABLE_DUAL_MODE(spi) ( (spi)->CTL &= ~SPI_CTL_DUALIOEN_Msk )
 
 /**
-  * @brief  Set SPI Dual IO direction to input.
+  * @brief  Enable Dual IO function and set SPI Dual IO direction to input.
   * @param[in]  spi is the base address of SPI module.
   * @return none
   * \hideinitializer
   */
-#define SPI_ENABLE_DUAL_INPUT_MODE(spi) ( (spi)->CTL &= ~SPI_CTL_QDIODIR_Msk )
+#define SPI_ENABLE_DUAL_INPUT_MODE(spi) ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_QDIODIR_Msk) | SPI_CTL_DUALIOEN_Msk )
 
 /**
-  * @brief  Set SPI Dual IO direction to output.
+  * @brief  Enable Dual IO function and set SPI Dual IO direction to output.
   * @param[in]  spi is the base address of SPI module.
   * @return none
   * \hideinitializer
   */
-#define SPI_ENABLE_DUAL_OUTPUT_MODE(spi) ( (spi)->CTL |= SPI_CTL_QDIODIR_Msk )
-
-/**
-  * @brief  Enable SPI QUAD IO function.
-  * @param[in]  spi is the base address of SPI module.
-  * @return none
-  * \hideinitializer
-  */
-#define SPI_ENABLE_QUAD_MODE(spi) ( (spi)->CTL |= SPI_CTL_QUADIOEN_Msk )
+#define SPI_ENABLE_DUAL_OUTPUT_MODE(spi) ( (spi)->CTL |= SPI_CTL_QDIODIR_Msk | SPI_CTL_DUALIOEN_Msk )
 
 /**
   * @brief  Disable SPI Dual IO function.
@@ -395,7 +364,7 @@ static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
   * @return none
   * \hideinitializer
   */
-#define SPI_ENABLE_QUAD_INPUT_MODE(spi) ( (spi)->CTL &= ~SPI_CTL_QDIODIR_Msk )
+#define SPI_ENABLE_QUAD_INPUT_MODE(spi) ( (spi)->CTL = ((spi)->CTL & ~SPI_CTL_QDIODIR_Msk) | SPI_CTL_QUADIOEN_Msk )
 
 /**
   * @brief  Set SPI Quad IO direction to output.
@@ -403,7 +372,7 @@ static __INLINE void SPI_SET_DATA_WIDTH(SPI_T *spi, uint32_t u32Width)
   * @return none
   * \hideinitializer
   */
-#define SPI_ENABLE_QUAD_OUTPUT_MODE(spi) ( (spi)->CTL |= SPI_CTL_QDIODIR_Msk )
+#define SPI_ENABLE_QUAD_OUTPUT_MODE(spi) ( (spi)->CTL |= SPI_CTL_QDIODIR_Msk | SPI_CTL_QUADIOEN_Msk )
 
 /**
   * @brief  Trigger RX PDMA transfer.
@@ -489,3 +458,4 @@ void SPI_DisableInt(SPI_T *spi, uint32_t u32Mask);
 #endif //__SPI_H__
 
 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
+
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf
index 70faed67f71..d82e9459c5c 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf
@@ -9,9 +9,9 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
 define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_IRAM_end__   = 0x20010000;
+define symbol __ICFEDIT_region_IRAM_end__   = 0x20010000 - 1;
 define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000;
-define symbol __ICFEDIT_region_XRAM_end__   = 0x60100000;
+define symbol __ICFEDIT_region_XRAM_end__   = 0x60100000 - 1;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
 define symbol __ICFEDIT_size_heap__   = 0xC0000;
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf
index 9d271180158..0aae6f9b302 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf
@@ -9,7 +9,7 @@ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
 define symbol __ICFEDIT_region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;
 define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_IRAM_end__   = 0x20010000;
+define symbol __ICFEDIT_region_IRAM_end__   = 0x20010000 - 1;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
 define symbol __ICFEDIT_size_heap__   = 0x8000;
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/startup_NUC472_442.c b/targets/TARGET_NUVOTON/TARGET_NUC472/device/startup_NUC472_442.c
index 4acab2847c0..a73f8f2ecb7 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/startup_NUC472_442.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/startup_NUC472_442.c
@@ -63,12 +63,11 @@ extern uint32_t __bss_extern_start__  WEAK;
 extern uint32_t __bss_extern_end__ WEAK;
 
 extern void uvisor_init(void);
-//#if defined(TOOLCHAIN_GCC_ARM)
-//extern void _start(void);
-//#endif
-extern void software_init_hook(void) __attribute__((weak));
-extern void __libc_init_array(void);
-extern int main(void);
+#if defined(TOOLCHAIN_GCC_ARM)
+extern void _start(void);
+#else
+#error("For GCC toolchain, only support GNU ARM Embedded")
+#endif
 #endif
 
 /* Default empty handler */
@@ -431,14 +430,15 @@ void Reset_Handler(void)
     /* Disable Power-on Reset function */
     SYS_DISABLE_POR();
     
-    /* Enable register write-protection function */
-    SYS_LockReg();
-    
     /**
-     * Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start.
+     * NOTE 1: Unlock is required for perhaps some register access in SystemInit().
+     * NOTE 2: Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start.
      */
     SystemInit();
     
+    /* Enable register write-protection function */
+    SYS_LockReg();
+
 #if defined(__CC_ARM)
     __main();
     
@@ -475,19 +475,7 @@ void Reset_Handler(void)
         }
     }
     
-    //uvisor_init();
-
-    if (software_init_hook) {
-        /**
-         * Give control to the RTOS via software_init_hook() which will also call __libc_init_array().
-         * Assume software_init_hook() is defined in libraries/rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h.
-         */
-        software_init_hook();
-    }
-    else {
-        __libc_init_array();
-        main();
-    }
+    _start();
     
 #endif
     /* Infinite loop */
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c
index 754a24e6f12..9a00d965c3e 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/gpio_irq_api.c
@@ -58,23 +58,23 @@ static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
 
 #define NU_MAX_PORT     (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
 
-#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
-#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE 0
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE 0
 #endif
 
-#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
-#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
 #endif
 static PinName gpio_irq_debounce_arr[] = {
-    MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
+    MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
 };
 
-#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
-#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCTL_DBCLKSRC_IRC10K
 #endif
 
-#ifndef MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
-#define MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
+#ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
+#define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCTL_DBCLKSEL_16
 #endif
 
 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
@@ -94,15 +94,16 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
     obj->irq_id = id;
 
     GPIO_T *gpio_base = NU_PORT_BASE(port_index);
+    // NOTE: In InterruptIn constructor, gpio_irq_init() is called with gpio_init_in() which is responsible for multi-function pin setting.
     //gpio_set(pin);
     
     {
-#if MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_ENABLE
+#if MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
         // Suppress compiler warning
         (void) gpio_irq_debounce_arr;
 
         // Configure de-bounce clock source and sampling cycle time
-        GPIO_SET_DEBOUNCE_TIME(MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
+        GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
         GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
 #else
         // Enable de-bounce if the pin is in the de-bounce enable list
@@ -119,7 +120,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
             if (pin_index == pin_index_debunce &&
                 port_index == port_index_debounce) {
                 // Configure de-bounce clock source and sampling cycle time
-                GPIO_SET_DEBOUNCE_TIME(MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_NUC472_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
+                GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
                 GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
                 break;
             }
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c b/targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c
index f5dc4a673a9..1dad55e527e 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/lp_ticker.c
@@ -137,7 +137,7 @@ timestamp_t lp_ticker_read()
         while (minor_clks == 0 || minor_clks == TMR2_CLK_PER_TMR2_INT);
 
         // Add power-down compensation
-        return ((uint64_t) major_minor_clks * US_PER_SEC / TMR3_CLK_PER_SEC / US_PER_TICK);
+        return ((uint64_t) major_minor_clks * US_PER_SEC / TMR2_CLK_PER_SEC / US_PER_TICK);
     }
     while (0);
 }
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/mbed_lib.json b/targets/TARGET_NUVOTON/TARGET_NUC472/mbed_lib.json
deleted file mode 100644
index 698dea779c9..00000000000
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/mbed_lib.json
+++ /dev/null
@@ -1,22 +0,0 @@
-{
-    "name": "NUC472",
-    "config": {
-        "gpio-irq-debounce-enable": {
-            "help": "Enable GPIO IRQ debounce",
-            "value": 0
-        },
-        "gpio-irq-debounce-enable-list": {
-            "help": "Comma separated pin list to enable GPIO IRQ debounce",
-            "value": "NC"
-        },
-        "gpio-irq-debounce-clock-source": {
-            "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
-            "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
-        },
-
-        "gpio-irq-debounce-sample-rate": {
-            "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
-            "value": "GPIO_DBCTL_DBCLKSEL_16"
-        }
-    }
-}
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c
index 906604c1a8d..cf7dfbf2d2a 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/rtc_api.c
@@ -26,31 +26,33 @@
 
 #define YEAR0       1900
 //#define EPOCH_YR    1970
-static int rtc_inited = 0;
 
 static const struct nu_modinit_s rtc_modinit = {RTC_0, RTC_MODULE, 0, 0, 0, RTC_IRQn, NULL};
 
 void rtc_init(void)
 {
-    if (rtc_inited) {
+    if (rtc_isenabled()) {
         return;
     }
-    rtc_inited = 1;
-    
-    // Enable IP clock
-    CLK_EnableModuleClock(rtc_modinit.clkidx);
     
     RTC_Open(NULL);
 }
 
 void rtc_free(void)
 {
-    // FIXME
+    // N/A
 }
 
 int rtc_isenabled(void)
 {
-    return rtc_inited;
+    // NOTE: To access (RTC) registers, clock must be enabled first.
+    if (! (CLK->APBCLK0 & CLK_APBCLK0_RTCCKEN_Msk)) {
+        // Enable IP clock
+        CLK_EnableModuleClock(rtc_modinit.clkidx);
+    }
+    
+    // NOTE: Check RTC Init Active flag to support crossing reset cycle.
+    return !! (RTC->INIT & RTC_INIT_INIT_Active_Msk);
 }
 
 /*
@@ -68,7 +70,9 @@ int rtc_isenabled(void)
 
 time_t rtc_read(void)
 {
-    if (! rtc_inited) {
+    // NOTE: After boot, RTC time registers are not synced immediately, about 1 sec latency.
+    //       RTC time got (through RTC_GetDateAndTime()) in this sec would be last-synced and incorrect.
+    if (! rtc_isenabled()) {
         rtc_init();
     }
     
@@ -94,7 +98,7 @@ time_t rtc_read(void)
 
 void rtc_write(time_t t)
 {
-    if (! rtc_inited) {
+    if (! rtc_isenabled()) {
         rtc_init();
     }
     
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c
index a67684d8d4e..b3dd9737aaa 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c
@@ -299,7 +299,11 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
     while (! UART_IS_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart))));
     
-    // TODO: Assert for not supported parity and data bits
+    // Sanity check arguments    
+    MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
+    MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) || (parity == ParityForced1) || (parity == ParityForced0));
+    MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
+    
     obj->serial.databits = data_bits;
     obj->serial.parity = parity;
     obj->serial.stopbits = stop_bits;
diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/spi_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/spi_api.c
index 7377915afc2..6b12a925f29 100644
--- a/targets/TARGET_NUVOTON/TARGET_NUC472/spi_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_NUC472/spi_api.c
@@ -566,7 +566,7 @@ static uint32_t spi_event_check(spi_t *obj)
     // Receive Time-Out
     if (spi_base->STATUS & SPI_STATUS_RXTOIF_Msk) {
         spi_base->STATUS = SPI_STATUS_RXTOIF_Msk;
-        //event |= SPI_EVENT_ERROR;
+        // Not using this IF. Just clear it.
     }
     // Transmit FIFO Under-Run
     if (spi_base->STATUS & SPI_STATUS_TXUFIF_Msk) {
diff --git a/targets/targets.json b/targets/targets.json
index 7da1bd6066e..0da3d6ab63f 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -3126,7 +3126,26 @@
         "extra_labels": ["NUVOTON", "NUC472", "NU_XRAM_SUPPORTED", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "config": {
+            "gpio-irq-debounce-enable": {
+                "help": "Enable GPIO IRQ debounce",
+                "value": 0
+            },
+            "gpio-irq-debounce-enable-list": {
+                "help": "Comma separated pin list to enable GPIO IRQ debounce",
+                "value": "NC"
+            },
+            "gpio-irq-debounce-clock-source": {
+                "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_IRC10K",
+                "value": "GPIO_DBCTL_DBCLKSRC_IRC10K"
+            },
+            "gpio-irq-debounce-sample-rate": {
+                "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
+                "value": "GPIO_DBCTL_DBCLKSEL_16"
+            }
+        },
         "inherits": ["Target"],
+        "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT"],
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN", "FLASH"],
         "features": ["LWIP"],
         "release_versions": ["5"],
@@ -3175,6 +3194,24 @@
         "extra_labels": ["NUVOTON", "M451", "NUMAKER_PFM_M453", "FLASH_CMSIS_ALGO"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
+        "config": {
+            "gpio-irq-debounce-enable": {
+                "help": "Enable GPIO IRQ debounce",
+                "value": 0
+            },
+            "gpio-irq-debounce-enable-list": {
+                "help": "Comma separated pin list to enable GPIO IRQ debounce",
+                "value": "NC"
+            },
+            "gpio-irq-debounce-clock-source": {
+                "help": "Select GPIO IRQ debounce clock source: GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC",
+                "value": "GPIO_DBCTL_DBCLKSRC_LIRC"
+            },
+            "gpio-irq-debounce-sample-rate": {
+                "help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
+                "value": "GPIO_DBCTL_DBCLKSEL_16"
+            }
+        },
         "inherits": ["Target"],
         "progen": {"target": "numaker-pfm-m453"},
         "device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN", "FLASH"],