diff --git a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf index 5827d60ebd4..6919fbc6085 100644 --- a/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf +++ b/targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf @@ -42,7 +42,7 @@ initialize by copy { readwrite }; do not initialize { section .noinit }; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf index 0c3b737744c..3b350140fdf 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf @@ -48,7 +48,7 @@ initialize by copy { readwrite }; do not initialize { section .noinit }; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; diff --git a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf index e73c38a0c1c..00e8559d2bc 100644 --- a/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf +++ b/targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf @@ -34,7 +34,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_r define region FlexRAM_region = mem:[from __region_FlexRAM_start__ to __region_FlexRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__]; diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf index 4bfab3fc15d..3e2a5840e1f 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf @@ -9,25 +9,22 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x00007fff; define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffffc00; define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffffcbf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0; -define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; +define symbol __ICFEDIT_region_RAM_end__ = 0x20000bff; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ define symbol __ICFEDIT_size_cstack__ = 0x200; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ -define symbol __region_RAM2_start__ = 0x20000000; -define symbol __region_RAM2_end__ = 0x20000bff; - define symbol __FlashConfig_start__ = 0x00000400; define symbol __FlashConfig_end__ = 0x0000040f; define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__]; diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf index 55caa808479..bf918e79d4b 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf @@ -9,25 +9,22 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001ffff; define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffff000; define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; -define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; +define symbol __ICFEDIT_region_RAM_end__ = 0x20002fff; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x1000; /**** End of ICF editor section. ###ICF###*/ -define symbol __region_RAM2_start__ = 0x20000000; -define symbol __region_RAM2_end__ = 0x20002fff; - define symbol __FlashConfig_start__ = 0x00000400; define symbol __FlashConfig_end__ = 0x0000040f; define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__]; diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf index 55caa808479..bf918e79d4b 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf @@ -9,25 +9,22 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001ffff; define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffff000; define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0; -define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; +define symbol __ICFEDIT_region_RAM_end__ = 0x20002fff; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ define symbol __ICFEDIT_size_cstack__ = 0x800; define symbol __ICFEDIT_size_heap__ = 0x1000; /**** End of ICF editor section. ###ICF###*/ -define symbol __region_RAM2_start__ = 0x20000000; -define symbol __region_RAM2_end__ = 0x20002fff; - define symbol __FlashConfig_start__ = 0x00000400; define symbol __FlashConfig_end__ = 0x0000040f; define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__]; diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf index 2a765b6731a..bca868ac572 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf @@ -9,26 +9,22 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0002ffff; define symbol __ICFEDIT_region_NVIC_start__ = 0x1fffe000; define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf; define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0; -define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff; +define symbol __ICFEDIT_region_RAM_end__ = 0x20005fff; /*-Sizes-*/ /*Heap 1/4 of ram and stack 1/8*/ define symbol __ICFEDIT_size_cstack__ = 0x1000; define symbol __ICFEDIT_size_heap__ = 0x4000; /**** End of ICF editor section. ###ICF###*/ -define symbol __region_RAM2_start__ = 0x20000000; -define symbol __region_RAM2_end__ = 0x20005fff; - define symbol __FlashConfig_start__ = 0x00000400; define symbol __FlashConfig_end__ = 0x0000040f; define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__]; initialize by copy { readwrite }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf index 54de75b7bd4..1cda80b4dc6 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf @@ -105,7 +105,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf index 6f9a97a619d..52f95125def 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf @@ -105,7 +105,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf index 206fcf91fe0..e7a0004138f 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf @@ -97,7 +97,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf index 6b645fee868..29e8d2875f7 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf @@ -94,7 +94,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf index b7ceb2c1b2d..a931fc334e5 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf @@ -108,7 +108,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf index 28794497a94..f58972ec707 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf @@ -104,7 +104,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf index 3d35a77229f..ad17676746e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf @@ -92,7 +92,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf index 5ec97d3327b..1ab1e4613d0 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf @@ -101,7 +101,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf index 4b753e15d1b..bdb7bc702ce 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf @@ -100,7 +100,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf index 3f32a843205..9c22121aa89 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf @@ -109,7 +109,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf index 96d5c1555b1..eb0eef97213 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x0800; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf index 96d5c1555b1..eb0eef97213 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x0800; define symbol __size_heap__ = 0x3000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf index 7edf37819cb..3375be364e6 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625MBED/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625MBED/MAX32625.icf index 6365e98e416..5f06fb644e9 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625MBED/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625MBED/MAX32625.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf index 1566573c706..1638d883d69 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf index 7cb8fbadc99..19b5ddd471e 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf +++ b/targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM define symbol __size_cstack__ = 0x5000; define symbol __size_heap__ = 0xA000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf index d71c75cb3fa..55d13fd7641 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf @@ -20,8 +20,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; - +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf index e53b889cc8e..8d9334e9ee6 100644 --- a/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf index 98c6cdea45f..79f8195f84d 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf @@ -22,7 +22,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf index d55af37da7d..b4aa8a9e04c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf @@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf index d8dee15e571..b77d0a3c889 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf @@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52832.icf b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52832.icf index 6c0e4f7ebad..98b494def62 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52832.icf +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52832.icf @@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf index 588f1e02db7..d11ef29f75a 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ define block IRAMVEC with alignment = 1024, size = 4 * (16 + 64) { }; diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf index 418eee680b3..d83c84f0cce 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ define block IRAMVEC with alignment = 1024, size = 4 * (16 + 96) { }; diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf index 4cb16de2d3a..26bb3d5fe72 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf index d82e9459c5c..fa5795043e9 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf @@ -24,7 +24,7 @@ define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFED define region XRAM_region = mem:[from __ICFEDIT_region_XRAM_start__ to __ICFEDIT_region_XRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { }; /* Move non-critical libraries to external SRAM while internal SRAM is insufficient. */ diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf index 0aae6f9b302..1392b13e313 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { }; diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf index 4fa111c6f99..b19329d5530 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf @@ -33,7 +33,7 @@ define region RAM_USB_region = mem:[from __RAM_USB_start__ to __RAM_USB_end__] define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf index 82211b9d2bb..7bb6c037e32 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf @@ -28,7 +28,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf index 64a361e64a0..56c69cf6621 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf @@ -28,7 +28,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf index 5a70d38b02d..a4313151a1d 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf @@ -28,7 +28,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf index e351413f0a7..babb4c5d24e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf @@ -32,7 +32,7 @@ define region SRAM1_region = mem:[from __SRAM1_start__ to __SRAM1_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf index 1985c370e65..5b3c5519472 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf @@ -32,7 +32,7 @@ define region SRAM1_region = mem:[from __SRAM1_start__ to __SRAM1_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf index 2384f52e84e..0404fa6deca 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf @@ -28,7 +28,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__]; define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf index ebf55e7559c..fd980c53620 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf index e52023155bc..bd3a419b106 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf index fb6b9bb2648..c98d9ac7ddf 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf @@ -32,7 +32,7 @@ define region USB_PKG_RAM_region = mem:[from __region_USB_PKG_RAM_start__ to __r define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf index c2bf0070188..37f33d0bb15 100644 --- a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf @@ -25,7 +25,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf index 0cea4b47c71..8eb0f1bc9be 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf @@ -32,7 +32,7 @@ define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf index 97484feaaf1..ebe4c864714 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf @@ -29,7 +29,7 @@ define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf index cc12f1bad07..01ab4c18173 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf +++ b/targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf @@ -24,7 +24,7 @@ define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__]; define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf index 328cbc30c34..313c9763014 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf index 4edf5683293..e06e89ac46d 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf index 328cbc30c34..313c9763014 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf index 16aac8518e6..75f1431085a 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf @@ -24,7 +24,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf index 370570693be..67a68297e56 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf @@ -110,7 +110,7 @@ define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_in define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf index eb219474d99..fcbd6ee45fb 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/device/TOOLCHAIN_IAR/LPC54618J512.icf @@ -93,7 +93,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi }; diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf index 6fd9f00fad1..bf66bb56760 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf @@ -53,7 +53,7 @@ define overlay MIBOVERLAY { section MIBSTARTSECTION }; define overlay MIBOVERLAY { section MIBSECTION }; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; define block RAM_VECTORS with alignment = 8, size = 0x90 { }; initialize by copy { readwrite }; diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/TOOLCHAIN_IAR/MBRZA1H.icf b/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/TOOLCHAIN_IAR/MBRZA1H.icf index 3bd5dca30fb..9de10c42d42 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/TOOLCHAIN_IAR/MBRZA1H.icf +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1H/device/TOOLCHAIN_IAR/MBRZA1H.icf @@ -45,7 +45,7 @@ define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { }; define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { }; define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { }; define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/device/TOOLCHAIN_IAR/VKRZA1H.icf b/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/device/TOOLCHAIN_IAR/VKRZA1H.icf index 30addf8e44e..0850ea1a1b8 100644 --- a/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/device/TOOLCHAIN_IAR/VKRZA1H.icf +++ b/targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/device/TOOLCHAIN_IAR/VKRZA1H.icf @@ -47,7 +47,7 @@ define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { }; define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { }; define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { }; define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf index be06f577525..d7b9f73e621 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf @@ -30,7 +30,7 @@ define region RAM_region = mem:[from __SRAM_start__ to __SRAM_end__] | mem:[from __DRAM_start__ to __DRAM_end__]; define block CSTACK with alignment = 8, size = 0x1000 { }; -define block HEAP with alignment = 8, size = 0x19000 { }; +define block HEAP with expanding size, minimum size = 0x19000, alignment = 8 { }; do not initialize { section .noinit }; @@ -210,4 +210,4 @@ place in RAM_region { block FPB_REMAP, }; -include "rtl8195a_rom.h"; +include "rtl8195a_rom.h"; \ No newline at end of file diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf index 1c5f98b6f31..a699a586824 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf index c0345cf3e83..b38b1d0513c 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf @@ -18,7 +18,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf index fc9e00ca528..4574f8bc9de 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf @@ -18,7 +18,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf index 1833a0c2a16..a91a423594e 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf @@ -18,7 +18,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf index 61a5f17c48e..98859c2e7ec 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf @@ -18,7 +18,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf index 2f8c627c702..8c5e3bb7893 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf @@ -18,7 +18,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf index 21cb93bac76..8dac80e6d6b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf index 97d4ed24907..a7d932825bf 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_def.h index 546122d81ec..30b200c4efc 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_def.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_def.h @@ -130,9 +130,9 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) | mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } @@ -140,9 +140,9 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) &~mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } #if defined ( __GNUC__ ) && !defined ( __CC_ARM ) diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf index d1ac2d8927c..c4cc6965564 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf index 98af5cefcf8..ef85562cf36 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf @@ -23,7 +23,7 @@ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMR define symbol __size_cstack__ = 0x600; define symbol __size_heap__ = 0xC00; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf index 9b1f074c538..6d2ceda5261 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf @@ -23,7 +23,7 @@ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMR define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf index 07a3fe81f5d..85ad25ab7bf 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf @@ -22,7 +22,7 @@ define region CCMRAM_region = mem:[from __region_CCMRAM_start__ to __region_CCMR define symbol __size_cstack__ = 0x600; define symbol __size_heap__ = 0xC00; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_def.h index 757a6e8458d..a8649007515 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_def.h +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_def.h @@ -129,9 +129,9 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) | mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } @@ -139,9 +139,9 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) &~mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } #if defined ( __GNUC__ ) && !defined ( __CC_ARM ) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf index 87e12d26bb3..2cbeefda3c4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -20,7 +20,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0xe68; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf index 24809f48a5f..8b7b468c213 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf @@ -26,7 +26,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __IC define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf index d472306bb09..0ed601866bb 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf index 1e99eadc1e0..aaa1ba766e6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf @@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf index da9bca46226..cc6b7f7714f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x1000; define symbol __size_heap__ = 0x2000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf index f481cdbf144..097e7c0661e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf index f702047a09c..53ba464f90f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf @@ -21,7 +21,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf index 027c72af4fb..ef538ed0364 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf index 8dcb1a8fea4..40bebab9a02 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf @@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __IC define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf index 97fd4ac509a..56f8829a2c7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf @@ -30,7 +30,7 @@ define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __I define region BKPSRAM_region = mem:[from __ICFEDIT_region_BKPSRAM_start__ to __ICFEDIT_region_BKPSRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf index 3b428be87cf..f79a5983b7f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf @@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __IC define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf index 674e1b3493d..291e44876fc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_IAR/stm32f446xx.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x8000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf index 0efe5d61476..4f3006cf4ee 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_IAR/stm32f469xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_def.h index 8462aa4fe02..2fb8f6e90bc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_def.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_def.h @@ -129,9 +129,9 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) | mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } @@ -139,9 +139,9 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) &~mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } #endif /* USE_RTOS */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf index 99918b98985..4fe30ab6827 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf @@ -23,7 +23,7 @@ define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_IT define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x13000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf index 09800c02be2..5c62f099073 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_IAR/stm32f756xg.icf @@ -22,7 +22,7 @@ define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_IT define symbol __size_cstack__ = 0x4000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf index 1c73fc150da..c0b8216e0cf 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf @@ -22,7 +22,7 @@ define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_IT define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf index 1c73fc150da..c0b8216e0cf 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_IAR/stm32f769xi.icf @@ -22,7 +22,7 @@ define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_IT define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0x10000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h index 825d7fd0a15..c3ffcaa444b 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_def.h @@ -130,9 +130,9 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) | mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } @@ -140,9 +140,9 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) &~mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } #if defined ( __GNUC__ ) && !defined ( __CC_ARM ) diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/device/TOOLCHAIN_IAR/stm32l072xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/device/TOOLCHAIN_IAR/stm32l072xx.icf index 65a11a2b35a..9c1f1e51bff 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/device/TOOLCHAIN_IAR/stm32l072xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L072CZ_LRWAN1/device/TOOLCHAIN_IAR/stm32l072xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x500; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf index c2d7fcf1372..3428a764977 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_IAR/stm32l031xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf index 65a11a2b35a..9c1f1e51bff 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_IAR/stm32l073xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x500; define symbol __size_heap__ = 0x1000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf index 96e6cf2b5d5..6b303f2062c 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_IAR/stm32l053xx.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x400; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf index aed878fb05b..fda38f58238 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -18,7 +18,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf index 9e1721e17c0..c5e75edc178 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_IAR/stm32l152xe.icf @@ -19,7 +19,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x2800; define symbol __size_heap__ = 0x5000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf index ebf7478802d..688047cd002 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_IAR/stm32l152xc.icf @@ -20,7 +20,7 @@ define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__] define symbol __size_cstack__ = 0x800; define symbol __size_heap__ = 0x800; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf index 9c478c51e2e..7bd849a34f7 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_IAR/stm32l432xx.icf @@ -18,7 +18,7 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define symbol __size_cstack__ = 0x2000; define symbol __size_heap__ = 0x4000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf index 15c4254b3f0..2f27b5a3dc3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf @@ -25,7 +25,7 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0xa000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf index 15c4254b3f0..2f27b5a3dc3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf @@ -25,7 +25,7 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0xa000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf index 8762dace3c1..4f0aadd2b4f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf @@ -22,7 +22,7 @@ define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_ define symbol __size_cstack__ = 0x8000; define symbol __size_heap__ = 0xa000; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block STACKHEAP with fixed order { block HEAP, block CSTACK }; initialize by copy with packing = zeros { readwrite }; diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h index ad596e5534f..4aa222473d3 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h +++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h @@ -132,9 +132,9 @@ static inline void atomic_set_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) | mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) | mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } @@ -142,9 +142,9 @@ static inline void atomic_clr_u32(volatile uint32_t *ptr, uint32_t mask) { uint32_t newValue; do { - newValue = (uint32_t)__LDREXW((volatile unsigned long *)ptr) &~mask; + newValue = (uint32_t)__LDREXW((volatile uint32_t *)ptr) &~mask; - } while (__STREXW(newValue,(volatile unsigned long*) ptr)); + } while (__STREXW(newValue,(volatile uint32_t *) ptr)); } #if defined ( __GNUC__ ) && !defined ( __CC_ARM ) diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf index f60b984a8cd..c2a946a641b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_IAR/efm32gg990f1024.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf index 18add8aec9d..a132ca60cd6 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_IAR/efm32hg322f64.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf index a21c1364c8a..a5a8c886f2b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_IAR/efm32lg990f256.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf index 66e60ebbd60..eb97abc3b33 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_IAR/efm32pg1b200f256.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf index 77502fddeba..458b884219b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG12/device/TOOLCHAIN_IAR/EFM32PG12B500F1024GL125.icf @@ -30,7 +30,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf index a21c1364c8a..a5a8c886f2b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_IAR/efm32wg990f256.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf index 5cabed38b6d..6ecee60fe6d 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_IAR/efm32zg222f32.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf index 851459f5e95..cf9fc94d594 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/TOOLCHAIN_IAR/efr32mg1p232f256mg48.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf index b13edd25a8b..6b3b67a25f2 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG12/device/TOOLCHAIN_IAR/efr32mg12p332f1024gl125.icf @@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf index 0857f4e510b..628738f9a9d 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/device/TOOLCHAIN_IAR/tmpm066fwug.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf index dd71139d172..a657f4b427d 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf index dd71139d172..a657f4b427d 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf index dd71139d172..a657f4b427d 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_IAR/W7500_Flash.icf @@ -19,7 +19,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { }; initialize by copy { readwrite }; do not initialize { section .noinit }; diff --git a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf index 356658423a0..5894da63104 100644 --- a/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf +++ b/targets/TARGET_ublox/TARGET_HI2110/device/TOOLCHAIN_IAR/hi2110.icf @@ -41,7 +41,7 @@ define region CSTACK_region = mem:[from __region_CSTACK_start__ to __region_CST define region IPC_region = mem:[from __region_IPC_start__ to __region_IPC_end__]; define block CSTACK with alignment = 8, size = __size_cstack__ { }; -define block HEAP with alignment = 8, size = __size_heap__ { }; +define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { }; define block RW { readwrite }; define block ZI { zi };