diff --git a/README.md b/README.md
index b7b7142..8158af4 100644
--- a/README.md
+++ b/README.md
@@ -9,6 +9,8 @@ Table of Contents
* [Usage](#usage)
* [STM32F1](#stm32f1)
* [BLUEPILL](#bluepill)
+* [STM32F4](#stm32f4)
+ * [CORE2](#core2)
* [STM32WL](#stm32wl)
* [SeeedStudio LoRa E5](#seeed-studio-lora-e5)
* [SeeedStudio LoRa E5 Mini](#seeed-studio-lora-e5-mini)
@@ -82,6 +84,19 @@ source: https://os.mbed.com/users/hudakz/code/mbed-os-bluepill/
(https://os.mbed.com/users/hudakz/code/STM32F103C8T6_Hello/)
+# STM32F4
+
+## CORE2
+
+MCU: STM32F407ZG
+
+TARGET: CORE2
+
+https://github.com/byq77/core2-mbed6-template
+
+
+
+
# STM32L0
## MURATA LPWAN Wireless Module
diff --git a/TARGET_STM32F4/CMakeLists.txt b/TARGET_STM32F4/CMakeLists.txt
index f79b509..17d5b99 100644
--- a/TARGET_STM32F4/CMakeLists.txt
+++ b/TARGET_STM32F4/CMakeLists.txt
@@ -1,2 +1,4 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
+
+add_subdirectory(TARGET_CORE2 EXCLUDE_FROM_ALL)
diff --git a/TARGET_STM32F4/TARGET_CORE2/CMakeLists.txt b/TARGET_STM32F4/TARGET_CORE2/CMakeLists.txt
new file mode 100644
index 0000000..b81ef01
--- /dev/null
+++ b/TARGET_STM32F4/TARGET_CORE2/CMakeLists.txt
@@ -0,0 +1,14 @@
+add_library(mbed-core2 INTERFACE)
+
+target_sources(mbed-core2
+ INTERFACE
+ PeripheralPins.c
+ system_clock.c
+)
+
+target_include_directories(mbed-core2
+ INTERFACE
+ .
+)
+
+target_link_libraries(mbed-core2 INTERFACE mbed-stm32f407xg)
diff --git a/TARGET_STM32F4/TARGET_CORE2/PeripheralPinMaps.h b/TARGET_STM32F4/TARGET_CORE2/PeripheralPinMaps.h
new file mode 100644
index 0000000..167713a
--- /dev/null
+++ b/TARGET_STM32F4/TARGET_CORE2/PeripheralPinMaps.h
@@ -0,0 +1,342 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2018, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+//==============================================================================
+// Notes
+//
+// - The pins mentioned Px_y_ALTz are alternative possibilities which use other
+// HW peripheral instances. You can use them the same way as any other "normal"
+// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
+// pinout image on mbed.org.
+//
+// - The pins which are connected to other components present on the board have
+// the comment "Connected to xxx". The pin function may not work properly in this
+// case. These pins may not be displayed on the board pinout image on mbed.org.
+// Please read the board reference manual and schematic for more information.
+//
+// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented
+// See https://os.mbed.com/teams/ST/wiki/STDIO for more information.
+//
+//==============================================================================
+
+//FIXME: Comment out peripherals that cannot be used!
+#ifndef MBED_PERIPHERALPINMAPS_H
+#define MBED_PERIPHERALPINMAPS_H
+
+#include "PinNamesTypes.h"
+#include
+
+//*** ADC ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_ADC[] = {
+ {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0
+ {PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0
+ {PA_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0
+ {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1
+ {PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1
+ {PA_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1
+ {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2
+ {PA_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2
+ {PA_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2
+ {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3
+ {PA_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3
+ {PA_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3
+ {PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4
+ {PA_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4
+ {PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5
+ {PA_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5
+ {PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6
+ {PA_6_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6
+ {PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7
+ {PA_7_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7
+ {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8
+ {PB_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8
+ {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9
+ {PB_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9
+ {PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10
+ {PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10
+ {PC_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10
+ {PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11
+ {PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11
+ {PC_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11
+ {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12
+ {PC_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12
+ {PC_2_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12
+ {PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13
+ {PC_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13
+ {PC_3_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13
+ {PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14
+ {PC_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14
+ {PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15
+ {PC_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15
+ {PF_3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9
+ {PF_4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14
+ {PF_5, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15
+ {PF_6, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4
+ {PF_7, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5
+ {PF_8, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6
+ {PF_9, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7
+ {PF_10, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_ADC_Internal[] = {
+ {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)},
+ {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)},
+ {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)},
+ {NC, NC, 0}
+};
+
+//*** DAC ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_DAC[] = {
+ {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1
+ {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2
+ {NC, NC, 0}
+};
+
+//*** I2C ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_I2C_SDA[] = {
+ {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_I2C_SCL[] = {
+ {PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+ {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+ {PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {PF_1, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+ {NC, NC, 0}
+};
+
+//*** PWM ***
+
+// TIM5 cannot be used because already used by the us_ticker
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_PWM[] = {
+ {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+ {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+ {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+ {PA_2_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+ {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+ {PA_3_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+ {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+ {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PA_6_ALT0, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+ {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+ {PA_7_ALT2, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+ {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+ {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+ {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+ {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+ {PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+ {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+ {PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+ {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+ {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+ {PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+ {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+ {PB_8_ALT0, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+ {PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+ {PB_9_ALT0, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+ {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+ {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+ {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PB_14_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+ {PB_14_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1
+ {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PB_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+ {PB_15_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2
+ {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+ {PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+ {PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+ {PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+ {PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+ {PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
+ {PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+ {PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
+ {PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+ {PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+ {PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+ {PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+ {PE_5, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1
+ {PE_6, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2
+ {PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+ {PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+ {PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+ {PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+ {PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+ {PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+ {PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+ {PF_6, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1
+ {PF_7, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1
+ {PF_8, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+ {PF_9, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+ {NC, NC, 0}
+};
+
+//*** SERIAL ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_UART_TX[] = {
+ {PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+ {PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_UART_RX[] = {
+ {PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+ {PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+ {PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PG_9, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_UART_RTS[] = {
+ {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_UART_CTS[] = {
+ {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+ {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+ {PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+ {PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
+ {NC, NC, 0}
+};
+
+//*** SPI ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_SPI_MOSI[] = {
+ {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_SPI_MISO[] = {
+ {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_SPI_SCLK[] = {
+ {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_SPI_SSEL[] = {
+ {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
+ {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
+ {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
+ {NC, NC, 0}
+};
+
+//*** CAN ***
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_CAN_RD[] = {
+ {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {NC, NC, 0}
+};
+
+MSTD_CONSTEXPR_OBJ_11 const PinMap PinMap_CAN_TD[] = {
+ {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
+ {PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
+ {NC, NC, 0}
+};
+
+#endif /* MBED_PERIPHERALPINMAPS_H */
\ No newline at end of file
diff --git a/TARGET_STM32F4/TARGET_CORE2/PeripheralPins.c b/TARGET_STM32F4/TARGET_CORE2/PeripheralPins.c
new file mode 100644
index 0000000..3a02871
--- /dev/null
+++ b/TARGET_STM32F4/TARGET_CORE2/PeripheralPins.c
@@ -0,0 +1,32 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2019, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+#include "PeripheralPins.h"
+#include "mbed_toolchain.h"
+#include "PeripheralPinMaps.h"
diff --git a/TARGET_STM32F4/TARGET_CORE2/PinNames.h b/TARGET_STM32F4/TARGET_CORE2/PinNames.h
new file mode 100644
index 0000000..93ff58a
--- /dev/null
+++ b/TARGET_STM32F4/TARGET_CORE2/PinNames.h
@@ -0,0 +1,478 @@
+/* mbed Microcontroller Library
+ *******************************************************************************
+ * Copyright (c) 2018, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *******************************************************************************
+ */
+
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+#include "PinNamesTypes.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ ALT0 = 0x100,
+ ALT1 = 0x200,
+ ALT2 = 0x300,
+ ALT3 = 0x400
+} ALTx;
+
+typedef enum {
+ PA_0 = 0x00,
+ PA_0_ALT0 = PA_0 | ALT0,
+ PA_0_ALT1 = PA_0 | ALT1,
+ PA_1 = 0x01,
+ PA_1_ALT0 = PA_1 | ALT0,
+ PA_1_ALT1 = PA_1 | ALT1,
+ PA_2 = 0x02,
+ PA_2_ALT0 = PA_2 | ALT0,
+ PA_2_ALT1 = PA_2 | ALT1,
+ PA_3 = 0x03,
+ PA_3_ALT0 = PA_3 | ALT0,
+ PA_3_ALT1 = PA_3 | ALT1,
+ PA_4 = 0x04,
+ PA_4_ALT0 = PA_4 | ALT0,
+ PA_5 = 0x05,
+ PA_5_ALT0 = PA_5 | ALT0,
+ PA_6 = 0x06,
+ PA_6_ALT0 = PA_6 | ALT0,
+ PA_7 = 0x07,
+ PA_7_ALT0 = PA_7 | ALT0,
+ PA_7_ALT1 = PA_7 | ALT1,
+ PA_7_ALT2 = PA_7 | ALT2,
+ PA_8 = 0x08,
+ PA_9 = 0x09,
+ PA_10 = 0x0A,
+ PA_11 = 0x0B,
+ PA_12 = 0x0C,
+ PA_13 = 0x0D,
+ PA_14 = 0x0E,
+ PA_15 = 0x0F,
+ PA_15_ALT0 = PA_15 | ALT0,
+
+ PB_0 = 0x10,
+ PB_0_ALT0 = PB_0 | ALT0,
+ PB_0_ALT1 = PB_0 | ALT1,
+ PB_1 = 0x11,
+ PB_1_ALT0 = PB_1 | ALT0,
+ PB_1_ALT1 = PB_1 | ALT1,
+ PB_2 = 0x12,
+ PB_3 = 0x13,
+ PB_3_ALT0 = PB_3 | ALT0,
+ PB_4 = 0x14,
+ PB_4_ALT0 = PB_4 | ALT0,
+ PB_4_ALT1 = PB_4 | ALT1,
+ PB_5 = 0x15,
+ PB_5_ALT0 = PB_5 | ALT0,
+ PB_5_ALT1 = PB_5 | ALT1,
+ PB_6 = 0x16,
+ PB_7 = 0x17,
+ PB_8 = 0x18,
+ PB_8_ALT0 = PB_8 | ALT0,
+ PB_8_ALT1 = PB_8 | ALT1,
+ PB_9 = 0x19,
+ PB_9_ALT0 = PB_9 | ALT0,
+ PB_9_ALT1 = PB_9 | ALT1,
+ PB_10 = 0x1A,
+ PB_11 = 0x1B,
+ PB_12 = 0x1C,
+ PB_13 = 0x1D,
+ PB_14 = 0x1E,
+ PB_14_ALT0 = PB_14 | ALT0,
+ PB_14_ALT1 = PB_14 | ALT1,
+ PB_15 = 0x1F,
+ PB_15_ALT0 = PB_15 | ALT0,
+ PB_15_ALT1 = PB_15 | ALT1,
+
+ PC_0 = 0x20,
+ PC_0_ALT0 = PC_0 | ALT0,
+ PC_0_ALT1 = PC_0 | ALT1,
+ PC_1 = 0x21,
+ PC_1_ALT0 = PC_1 | ALT0,
+ PC_1_ALT1 = PC_1 | ALT1,
+ PC_2 = 0x22,
+ PC_2_ALT0 = PC_2 | ALT0,
+ PC_2_ALT1 = PC_2 | ALT1,
+ PC_3 = 0x23,
+ PC_3_ALT0 = PC_3 | ALT0,
+ PC_3_ALT1 = PC_3 | ALT1,
+ PC_4 = 0x24,
+ PC_4_ALT0 = PC_4 | ALT0,
+ PC_5 = 0x25,
+ PC_5_ALT0 = PC_5 | ALT0,
+ PC_6 = 0x26,
+ PC_6_ALT0 = PC_6 | ALT0,
+ PC_7 = 0x27,
+ PC_7_ALT0 = PC_7 | ALT0,
+ PC_8 = 0x28,
+ PC_8_ALT0 = PC_8 | ALT0,
+ PC_9 = 0x29,
+ PC_9_ALT0 = PC_9 | ALT0,
+ PC_10 = 0x2A,
+ PC_10_ALT0 = PC_10 | ALT0,
+ PC_11 = 0x2B,
+ PC_11_ALT0 = PC_11 | ALT0,
+ PC_12 = 0x2C,
+ PC_13 = 0x2D,
+ PC_14 = 0x2E,
+ PC_15 = 0x2F,
+
+ PD_0 = 0x30,
+ PD_1 = 0x31,
+ PD_2 = 0x32,
+ PD_3 = 0x33,
+ PD_4 = 0x34,
+ PD_5 = 0x35,
+ PD_6 = 0x36,
+ PD_7 = 0x37,
+ PD_8 = 0x38,
+ PD_9 = 0x39,
+ PD_10 = 0x3A,
+ PD_11 = 0x3B,
+ PD_12 = 0x3C,
+ PD_13 = 0x3D,
+ PD_14 = 0x3E,
+ PD_15 = 0x3F,
+
+ PE_0 = 0x40,
+ PE_1 = 0x41,
+ PE_2 = 0x42,
+ PE_3 = 0x43,
+ PE_4 = 0x44,
+ PE_5 = 0x45,
+ PE_6 = 0x46,
+ PE_7 = 0x47,
+ PE_8 = 0x48,
+ PE_9 = 0x49,
+ PE_10 = 0x4A,
+ PE_11 = 0x4B,
+ PE_12 = 0x4C,
+ PE_13 = 0x4D,
+ PE_14 = 0x4E,
+ PE_15 = 0x4F,
+
+ PF_0 = 0x50,
+ PF_1 = 0x51,
+ PF_2 = 0x52,
+ PF_3 = 0x53,
+ PF_4 = 0x54,
+ PF_5 = 0x55,
+ PF_6 = 0x56,
+ PF_7 = 0x57,
+ PF_8 = 0x58,
+ PF_9 = 0x59,
+ PF_10 = 0x5A,
+ PF_11 = 0x5B,
+ PF_12 = 0x5C,
+ PF_13 = 0x5D,
+ PF_14 = 0x5E,
+ PF_15 = 0x5F,
+
+ PG_0 = 0x60,
+ PG_1 = 0x61,
+ PG_2 = 0x62,
+ PG_3 = 0x63,
+ PG_4 = 0x64,
+ PG_5 = 0x65,
+ PG_6 = 0x66,
+ PG_7 = 0x67,
+ PG_8 = 0x68,
+ PG_9 = 0x69,
+ PG_10 = 0x6A,
+ PG_11 = 0x6B,
+ PG_12 = 0x6C,
+ PG_13 = 0x6D,
+ PG_14 = 0x6E,
+ PG_15 = 0x6F,
+
+ PH_0 = 0x70,
+ PH_1 = 0x71,
+ PH_2 = 0x72,
+ PH_3 = 0x73,
+ PH_4 = 0x74,
+ PH_5 = 0x75,
+ PH_6 = 0x76,
+ PH_7 = 0x77,
+ PH_8 = 0x78,
+ PH_9 = 0x79,
+ PH_10 = 0x7A,
+ PH_11 = 0x7B,
+ PH_12 = 0x7C,
+ PH_13 = 0x7D,
+ PH_14 = 0x7E,
+ PH_15 = 0x7F,
+
+ PI_0 = 0x80,
+ PI_1 = 0x81,
+ PI_2 = 0x82,
+ PI_3 = 0x83,
+ PI_4 = 0x84,
+ PI_5 = 0x85,
+ PI_6 = 0x86,
+ PI_7 = 0x87,
+ PI_8 = 0x88,
+ PI_9 = 0x89,
+ PI_10 = 0x8A,
+ PI_11 = 0x8B,
+ PI_12 = 0x8C,
+ PI_13 = 0x8D,
+ PI_14 = 0x8E,
+ PI_15 = 0x8F,
+
+ // ADC internal channels
+ ADC_TEMP = 0xF0,
+ ADC_VREF = 0xF1,
+ ADC_VBAT = 0xF2,
+
+ /**** USB pins ****/
+ USB_OTG_FS_DM = PA_11,
+ USB_OTG_FS_DP = PA_12,
+
+ /**** OSCILLATOR pins ****/
+ RCC_OSC32_IN = PC_14,
+ RCC_OSC32_OUT = PC_15,
+ RCC_OSC_IN = PH_0,
+ RCC_OSC_OUT = PH_1,
+
+ /**** DEBUG pins ****/
+ SYS_JTCK_SWCLK = PA_14,
+ SYS_JTDI = PA_15,
+ SYS_JTMS_SWDIO = PA_13,
+
+ // STDIO for console print
+#ifdef MBED_CONF_TARGET_STDIO_UART_TX
+ CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX,
+#else
+ CONSOLE_TX = PB_10,
+#endif
+#ifdef MBED_CONF_TARGET_STDIO_UART_RX
+ CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX,
+#else
+ CONSOLE_RX = PB_11,
+#endif
+
+ // Not connected
+ NC = (int)0xFFFFFFFF
+} PinName;
+
+// Standardized LED and button names
+#define LED1 PE_2 // [L1]
+#define LED2 PE_3 // [L2]
+#define LED3 PE_4 // [L3]
+#define BUTTON1 PG_12 // [hBtn1]
+#define BUTTON2 PG_13 // [hBtn2]
+
+// hSensor1 port pins
+#define SENS1_PIN1 PA_2
+#define SENS1_PIN1_ALT0 PA_2_ALT0
+#define SENS1_PIN1_ALT1 PA_2_ALT1
+#define SENS1_PIN2 PG_3
+#define SENS1_PIN3 PB_8
+#define SENS1_PIN3_ALT0 PB_8_ALT0
+#define SENS1_PIN3_ALT1 PB_8_ALT1
+#define SENS1_PIN4 PB_9
+#define SENS1_PIN4_ALT0 PB_9_ALT0
+#define SENS1_PIN4_ALT1 PB_9_ALT1
+
+// hSensor2 port pins
+#define SENS2_PIN1 PA_6
+#define SENS2_PIN1_ALT0 PA_6_ALT0
+#define SENS2_PIN2 PC_8
+#define SENS2_PIN2_ALT0 PC_8_ALT0
+#define SENS2_PIN3 PA_8
+#define SENS2_PIN4 PC_9
+#define SENS2_PIN4_ALT0 PC_9_ALT0
+
+// hSensor3 port pins
+#define SENS3_PIN1 PC_4
+#define SENS3_PIN1_ALT0 PC_4_ALT0
+#define SENS3_PIN2 PG_2
+#define SENS3_PIN3 PC_12 // UART_5_TX
+#define SENS3_PIN3_UART_TX PC_12 // UART_5_TX
+#define SENS3_PIN4 PD_2 // UART_5_RX
+#define SENS3_PIN4_UART_RX PD_2 // UART_5_RX
+
+// hSensor4 port pins
+#define SENS4_PIN1 PC_5
+#define SENS4_PIN1_ALT0 PC_5_ALT0
+#define SENS4_PIN2 PD_15
+#define SENS4_PIN3 PG_14 // USART_6_TX
+#define SENS4_PIN3_UART_TX PG_14 // USART_6_TX
+#define SENS4_PIN4 PG_9 // USART_6_RX
+#define SENS4_PIN4_UART_RX PG_9 // USART_6_RX
+
+// hSensor5 port pins
+#define SENS5_PIN1 PB_0
+#define SENS5_PIN1_ALT0 PB_0_ALT0
+#define SENS5_PIN1_ALT1 PB_0_ALT1
+#define SENS5_PIN2 PD_14
+#define SENS5_PIN3 PD_13
+#define SENS5_PIN4 PD_12
+
+// hSensor6 port pins
+#define SENS6_PIN1 PB_1
+#define SENS6_PIN2 PD_8
+#define SENS6_PIN3 PD_10
+#define SENS6_PIN4 PD_9
+
+#define SENS_POWER_ON PG_4 // SENSOR 5V REGULATOR TOGGLE
+
+// hExt port pins
+#define EXT_PIN1 PF_3
+#define EXT_PIN2 PF_10
+#define EXT_PIN3 PF_4
+#define EXT_PIN4 PF_5
+#define EXT_PIN5 PC_0
+#define EXT_PIN5_ALT0 PC_0_ALT0
+#define EXT_PIN5_ALT1 PC_0_ALT1
+#define EXT_PIN6 PD_6 // USART_2_RX
+#define EXT_PIN7 PD_5 // USART_2_TX
+#define EXT_PIN8 PB_13 // SCK SPI
+#define EXT_PIN9 PC_2 // MISO SPI
+#define EXT_PIN9_ALT0 PC_2_ALT0
+#define EXT_PIN9_ALT1 PC_2_ALT1
+#define EXT_PIN10 PC_3 // MOSI SPI
+#define EXT_PIN10_ALT0 PC_3_ALT0
+#define EXT_PIN10_ATL1 PC_3_ALT1
+#define EXT_PIN11 PF_0 // SDA I2C
+#define EXT_PIN12 PF_1 // SCL I2C
+
+// Legacy SPI aliases
+#define I2C_SCL SENS1_PIN3
+#define I2C_SDA SENS1_PIN4
+#define SPI_MOSI EXT_PIN10
+#define SPI_MISO EXT_PIN9
+#define SPI_SCK EXT_PIN8
+
+// SBC port pins
+#define SBC_SERIAL_TX PA_9
+#define SBC_SERIAL_RX PA_10
+#define SBC_CONSOLE PG_5
+#define SBC_STATUS PG_6
+#define SBC_BTN PG_7
+
+// CAN pins
+#define CAN_TX PD_1
+#define CAN_RX PD_0
+#define CAN_EN PA_15
+
+// USB-B/USB-micro FTDI pins
+#define FT_SERIAL_TX PB_10
+#define FT_SERIAL_RX PB_11
+#define FT_CBUS3 PD_11
+
+// HOST USB pins
+#define USB_DM PA_11
+#define USB_DP PA_12
+#define USB_CHARGE PE_8
+#define USB_CHARGE_IND PE_7
+
+// SD reader pins
+#define SD_MOSI PB_5_ALT0
+#define SD_MISO PC_11
+#define SD_CLK PC_10
+#define SD_CS PB_3_ALT0
+#define SD_IN PG_15
+#define SD_POWER_ON PD_7
+
+// SERVO pins
+#define SERVO1_PWM PE_9
+#define SERVO2_PWM PE_11
+#define SERVO3_PWM PE_13
+#define SERVO4_PWM PE_14
+#define SERVO5_PWM PB_15
+#define SERVO5_PWM_ALT0 PB_15_ALT0
+#define SERVO5_PWM_ALT1 PB_15_ALT1
+#define SERVO6_PWM PB_14
+#define SERVO6_PWM_ALT0 PB_14_ALT0
+#define SERVO6_PWM_ALT1 PB_14_ALT1
+#define SERVO_ADC PA_3
+#define SERVO_ADC_ALT0 PA_3_ALT0
+#define SERVO_ADC_ALT1 PA_3_ALT1
+#define SERVO_SEL1 PE_10
+#define SERVO_SEL2 PE_12
+#define SERVO_POWER_ON PE_15
+
+// Battery and BOOT pins
+#define BAT_MEAS PA_5 // VIN SUPPLY MEASURMENT
+
+#define BAT_MEAS_ALT0 PA_5_ALT0 // UPPER_RESISTOR: 56kOhm
+ // LOWER_RESISTOR: 10kOhm
+ // Volts = ((2 * ADC_READ))/2520 * (UPPER_RESISTOR + LOWER_RESISTOR) / LOWER_RESISTOR;
+#define BOOT1 PB_2
+
+// hMot1 port pins
+#define MOT1_PWM PF_6
+#define MOT1A_IN PG_10
+#define MOT1B_IN PG_11
+#define MOT1A_ENC PA_0
+#define MOT1A_ENC_ALT0 PA_0_ALT0
+#define MOT1A_ENC_ALT1 PA_0_ALT1
+#define MOT1B_ENC PA_1
+
+// hMot2 port pins
+#define MOT2_PWM PF_7
+#define MOT2A_IN PD_3
+#define MOT2B_IN PD_4
+#define MOT2A_ENC PC_6
+#define MOT2A_ENC_ALT0 PC_6_ALT0
+#define MOT2B_ENC PC_7
+#define MOT2B_ENC_ALT0 PC_7_ALT0
+
+// hMot3 port pins
+#define MOT3_PWM PF_8
+#define MOT3A_IN PC_15
+#define MOT3B_IN PF_2
+#define MOT3A_ENC PB_4
+#define MOT3A_ENC_ALT0 PB_4_ALT0
+#define MOT3A_ENC_ALT1 PB_4_ALT1
+#define MOT3B_ENC PA_7
+#define MOT3B_ENC_ALT0 PA_7_ALT0
+#define MOT3B_ENC_ALT1 PA_7_ALT1
+#define MOT3B_ENC_ALT2 PA_7_ALT2
+
+// hMot4 port pins
+#define MOT4_PWM PF_9
+#define MOT4A_IN PE_5
+#define MOT4B_IN PE_6
+#define MOT4A_ENC PB_6
+#define MOT4B_ENC PB_7
+
+#define MOT12_SLEEP PC_13
+#define MOT12_FAULT PE_0
+#define MOT34_SLEEP PC_14
+#define MOT34_FAULT PE_1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/TARGET_STM32F4/TARGET_CORE2/system_clock.c b/TARGET_STM32F4/TARGET_CORE2/system_clock.c
new file mode 100644
index 0000000..c63a811
--- /dev/null
+++ b/TARGET_STM32F4/TARGET_CORE2/system_clock.c
@@ -0,0 +1,238 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ *
+ * Copyright (c) 2015-2021 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/**
+ * This file configures the system clock as follows:
+ *-----------------------------------------------------------------------------
+ * System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
+ * | (external 8 MHz clock) | (internal 16 MHz)
+ * | 2- PLL_HSE_XTAL |
+ * | (external 8 MHz xtal) |
+ *-----------------------------------------------------------------------------
+ * SYSCLK(MHz) | 168 | 168
+ *-----------------------------------------------------------------------------
+ * AHBCLK (MHz) | 168 | 168
+ *-----------------------------------------------------------------------------
+ * APB1CLK (MHz) | 42 | 42
+ *-----------------------------------------------------------------------------
+ * APB2CLK (MHz) | 84 | 84
+ *-----------------------------------------------------------------------------
+ * USB capable (48 MHz precise clock) | YES | NO
+ *-----------------------------------------------------------------------------
+**/
+
+#include "stm32f4xx.h"
+#include "mbed_error.h"
+
+// clock source is selected with CLOCK_SOURCE in json config
+#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
+#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
+#define USE_PLL_HSI 0x2 // Use HSI internal clock
+
+#ifndef CLOCK_CONFIG_ADV // enable settings for Mbed Os 5.14
+ #define CLOCK_CONFIG_ADV 0
+#endif /* CLOCK_CONFIG_ADV */
+
+#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
+#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
+
+#if ((CLOCK_SOURCE) & USE_PLL_HSI)
+uint8_t SetSysClock_PLL_HSI(void);
+#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
+
+/**
+ * @brief Setup the microcontroller system
+ * Initialize the FPU setting, vector table location and External memory
+ * configuration.
+ * @param None
+ * @retval None
+ */
+void SystemInit(void)
+{
+#include "nvic_addr.h" // MBED
+ SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; // MBED
+
+ /* FPU settings ------------------------------------------------------------*/
+ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
+ #endif
+
+#if (CLOCK_CONFIG_ADV == 1)
+ /* Reset the RCC clock configuration to the default reset state ------------*/
+ /* Set HSION bit */
+ RCC->CR |= (uint32_t)0x00000001;
+
+ /* Reset CFGR register */
+ RCC->CFGR = 0x00000000;
+
+ /* Reset HSEON, CSSON and PLLON bits */
+ RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+ /* Reset PLLCFGR register */
+ RCC->PLLCFGR = 0x24003010;
+
+ /* Reset HSEBYP bit */
+ RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+ /* Disable all interrupts */
+ RCC->CIR = 0x00000000;
+#endif /* CLOCK_CONFIG_ADV */
+
+#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+
+ /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+ SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+
+/**
+ * @brief Configures the System clock source, PLL Multiplier and Divider factors,
+ * AHB/APBx prescalers and Flash settings
+ * @note This function should be called only once the RCC clock configuration
+ * is reset to the default reset state (done in SystemInit() function).
+ * @param None
+ * @retval None
+ */
+
+MBED_WEAK void SetSysClock(void)
+{
+#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
+ /* 1- Try to start with HSE and external clock */
+ if (SetSysClock_PLL_HSE(1) == 0)
+#endif
+ {
+#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
+ /* 2- If fail try to start with HSE and external xtal */
+ if (SetSysClock_PLL_HSE(0) == 0)
+#endif
+ {
+#if ((CLOCK_SOURCE) & USE_PLL_HSI)
+ /* 3- If fail start with HSI clock */
+ if (SetSysClock_PLL_HSI() == 0)
+#endif
+ {
+ {
+ error("SetSysClock failed\n");
+ }
+ }
+ }
+ }
+}
+
+#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
+/******************************************************************************/
+/* PLL (clocked by HSE) used as System clock source */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+ /* The voltage scaling allows optimizing the power consumption when the device is
+ clocked below the maximum system frequency, to update the voltage scaling value
+ regarding system frequency refer to product datasheet. */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /* Enable HSE oscillator and activate PLL with HSE as source */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ if (bypass == 0) {
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
+ } else {
+ RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
+ }
+ RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
+ RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
+ RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ return 0; // FAIL
+ }
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 168 MHz
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz (SPI1 clock...)
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+ return 0; // FAIL
+ }
+
+ /* Output clock on MCO1 pin(PA8) for debugging purpose */
+ /*
+ if (bypass == 0)
+ HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
+ else
+ HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
+ */
+
+ return 1; // OK
+}
+#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
+
+#if ((CLOCK_SOURCE) & USE_PLL_HSI)
+/******************************************************************************/
+/* PLL (clocked by HSI) used as System clock source */
+/******************************************************************************/
+uint8_t SetSysClock_PLL_HSI(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+ /* The voltage scaling allows optimizing the power consumption when the device is
+ clocked below the maximum system frequency, to update the voltage scaling value
+ regarding system frequency refer to product datasheet. */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /* Enable HSI oscillator and activate PLL with HSI as source */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = 16; // VCO input clock = 1 MHz (16 MHz / 16)
+ RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 168 MHz (336 MHz / 2)
+ RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> freq is ok but not precise enough
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ return 0; // FAIL
+ }
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 168 MHz
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 168 MHz
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 42 MHz
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 84 MHz
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
+ return 0; // FAIL
+ }
+
+ /* Output clock on MCO1 pin(PA8) for debugging purpose */
+ //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
+
+ return 1; // OK
+}
+#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
\ No newline at end of file
diff --git a/custom_targets.json b/custom_targets.json
index a08e98e..0f71daa 100644
--- a/custom_targets.json
+++ b/custom_targets.json
@@ -88,5 +88,27 @@
"LED1=PA_9",
"LED2=PA_10"
]
+ },
+ "CORE2":
+ {
+ "inherits": ["MCU_STM32F4"],
+ "extra_labels_add": ["STM32F407xG"],
+ "macros_add": [
+ "STM32F407xx",
+ "ENCODER_1=TIM2",
+ "ENCODER_2=TIM8",
+ "ENCODER_3=TIM3",
+ "ENCODER_4=TIM4",
+ "UPPER_RESISTOR=5.6e4",
+ "LOWER_RESISTOR=1.0e4",
+ "VIN_MEAS_CORRECTION=0.986"
+ ],
+ "overrides": {
+ "lse_available": 0,
+ "clock_source": "USE_PLL_HSE_XTAL"
+ },
+ "device_has_add": ["TRNG", "CAN"],
+ "device_has_remove": ["LPTICKER"],
+ "device_name": "STM32F407ZG"
}
}