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Added HAL GPIO for CA44
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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_rcc_ex.h

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3571,6 +3571,20 @@ typedef struct
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tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
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UNUSED(tmpreg); \
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} while(0U)
3574+
#define __HAL_RCC_GPIOF_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
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SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
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UNUSED(tmpreg); \
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} while(0U)
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#define __HAL_RCC_GPIOG_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
3583+
SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
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/* Delay after an RCC peripheral clock enabling */ \
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tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
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UNUSED(tmpreg); \
3587+
} while(0U)
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#define __HAL_RCC_CRC_CLK_ENABLE() do { \
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__IO uint32_t tmpreg = 0x00U; \
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SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
@@ -4722,7 +4736,7 @@ typedef struct
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/*----------------------------------------------------------------------------*/
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/*-------STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx-------*/
4725-
#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
4739+
#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
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/** @defgroup RCCEx_AHB1_Clock_Enable_Disable AHB1 Peripheral Clock Enable Disable
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* @brief Enables or disables the AHB1 peripheral clock.
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* @note After reset, the peripheral clock (used for registers read/write access)

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