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| 1 | +# Licensed to the Apache Software Foundation (ASF) under one |
| 2 | +# or more contributor license agreements. See the NOTICE file |
| 3 | +# distributed with this work for additional information |
| 4 | +# regarding copyright ownership. The ASF licenses this file |
| 5 | +# to you under the Apache License, Version 2.0 (the |
| 6 | +# "License"); you may not use this file except in compliance |
| 7 | +# with the License. You may obtain a copy of the License at |
| 8 | +# |
| 9 | +# http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | +# |
| 11 | +# Unless required by applicable law or agreed to in writing, |
| 12 | +# software distributed under the License is distributed on an |
| 13 | +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
| 14 | +# KIND, either express or implied. See the License for the |
| 15 | +# specific language governing permissions and limitations |
| 16 | +# under the License. |
| 17 | +import tvm |
| 18 | +from tvm.script import ir as I |
| 19 | +from tvm.script import tir as T |
| 20 | +from tvm.meta_schedule.testing import te_workload |
| 21 | + |
| 22 | +# pylint: disable=invalid-name,no-member,line-too-long,too-many-nested-blocks,no-self-argument,missing-class-docstring,missing-function-docstring |
| 23 | +# fmt: off |
| 24 | + |
| 25 | +@I.ir_module |
| 26 | +class Module: |
| 27 | + @T.prim_func |
| 28 | + def main( |
| 29 | + A: T.Buffer((729, 729), "float32"), |
| 30 | + B: T.Buffer((729, 729), "float32"), |
| 31 | + C: T.Buffer((729, 729), "float32"), |
| 32 | + ): |
| 33 | + T.func_attr( |
| 34 | + { |
| 35 | + "global_symbol": "test", |
| 36 | + "target": T.target({"keys": ["cpu"], "kind": "llvm", "tag": ""}), |
| 37 | + "tir.noalias": True, |
| 38 | + } |
| 39 | + ) |
| 40 | + # with T.block("root"): |
| 41 | + for i, j, k in T.grid(729, 729, 729): |
| 42 | + with T.block("C"): |
| 43 | + v_i, v_j, v_k = T.axis.remap("SSR", [i, j, k]) |
| 44 | + T.reads(A[v_i, v_k], B[v_k, v_j]) |
| 45 | + T.writes(C[v_i, v_j]) |
| 46 | + with T.init(): |
| 47 | + C[v_i, v_j] = T.float32(0) |
| 48 | + C[v_i, v_j] = C[v_i, v_j] + A[v_i, v_k] * B[v_k, v_j] |
| 49 | + |
| 50 | +# fmt: on |
| 51 | +# pylint: enable=invalid-name,no-member,line-too-long,too-many-nested-blocks,no-self-argument,missing-class-docstring,missing-function-docstring |
| 52 | + |
| 53 | + |
| 54 | +def test_host_func(): |
| 55 | + """Test that host functions are not split.""" |
| 56 | + # te schedule copied from test_tir_transform_split_host_device.py |
| 57 | + |
| 58 | + func = tvm.te.create_prim_func( |
| 59 | + te_workload.matmul(729, 729, 729, in_dtype="float32", out_dtype="float32") |
| 60 | + ) |
| 61 | + mod = tvm.ir.IRModule({"main": func}) |
| 62 | + target = tvm.target.Target("cuda") |
| 63 | + mod = tvm.tir.transform.Apply( |
| 64 | + lambda f: f.with_attr( |
| 65 | + { |
| 66 | + "global_symbol": "test", |
| 67 | + "tir.is_host_func": 1, |
| 68 | + } |
| 69 | + ) |
| 70 | + )(mod) |
| 71 | + mod = tvm.tir.transform.BindTarget(target)(mod) |
| 72 | + tvm.ir.assert_structural_equal(mod, Module) |
| 73 | + assert ( |
| 74 | + "tir.is_host_func" not in mod["main"].attrs |
| 75 | + ), """Target and is_host_func attributes should be mutually exclusive""" |
| 76 | + |
| 77 | + |
| 78 | +if __name__ == "__main__": |
| 79 | + test_host_func() |
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