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[RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA #3009 (#3010)
* merge files * move verilator to the right place * change name to tsim * add default rule to be build and run * add README for tsim * Update README.md * add some structural feedback * change name of VTASim to VTADPISim * more renaming * update comment * add license * fix indentation * add switch for vta-tsim * add more licenses * update readme * address some of the new feedback * add some feedback from cpplint * add one more whitespace * pass pointer so linter is happy * pass pointer so linter is happy * README moved to vta documentation * create types for dpi functions, so they can be handle easily * fix pointer style * add feedback from docs * parametrize width data and pointers * fix comments * fix comment * add comment to class * add missing parameters * move README back to tsim example * add feedback * add more comments and remove un-necessary argument in finish * update comments * fix cpplint * fix doc
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‎cmake/config.cmake‎

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@@ -131,3 +131,6 @@ set(USE_SORT ON)
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# Build ANTLR parser for Relay text format
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set(USE_ANTLR OFF)
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# Build TSIM for VTA
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set(USE_VTA_TSIM OFF)

‎cmake/modules/VTA.cmake‎

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find_library(__cma_lib NAMES cma PATH /usr/lib)
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target_link_libraries(vta ${__cma_lib})
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endif()
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if(NOT USE_VTA_TSIM STREQUAL "OFF")
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include_directories("vta/include")
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file(GLOB RUNTIME_DPI_SRCS vta/src/dpi/module.cc)
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list(APPEND RUNTIME_SRCS ${RUNTIME_DPI_SRCS})
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endif()
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else()
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message(STATUS "Cannot found python in env, VTA build is skipped..")
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endif()

‎vta/apps/tsim_example/CMakeLists.txt‎

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# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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cmake_minimum_required(VERSION 3.2)
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project(tsim C CXX)
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set(TVM_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../../)
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set(VTA_DIR ${TVM_DIR}/vta)
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include_directories("${TVM_DIR}/include")
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include_directories("${TVM_DIR}/3rdparty/dlpack/include")
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include_directories("${TVM_DIR}/3rdparty/dmlc-core/include")
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include_directories("${TVM_DIR}/vta/src/dpi")
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set(CMAKE_C_FLAGS "-O2 -Wall -fPIC -fvisibility=hidden")
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set(CMAKE_CXX_FLAGS "-O2 -Wall -fPIC -fvisibility=hidden -std=c++11")
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if (CMAKE_CXX_COMPILER_ID MATCHES "GNU" AND
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CMAKE_CXX_COMPILER_VERSION VERSION_GREATER 7.0)
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set(CMAKE_CXX_FLAGS "-faligned-new ${CMAKE_CXX_FLAGS}")
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endif()
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# Module rules
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include(cmake/modules/tsim.cmake)
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include(cmake/modules/driver.cmake)

‎vta/apps/tsim_example/Makefile‎

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# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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export PYTHONPATH:=$(PWD)/python:$(PYTHONPATH)
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BUILD_DIR = $(shell python python/tsim/config.py --get-build-name)
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TVM_DIR = $(abspath ../../../)
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TSIM_TARGET = verilog
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TSIM_TOP_NAME = TestAccel
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TSIM_BUILD_NAME = build
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# optional
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TSIM_TRACE_NAME = trace.vcd
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default: cmake run
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.PHONY: cmake
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cmake: | $(BUILD_DIR)
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cd $(BUILD_DIR) && cmake .. && make
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$(BUILD_DIR):
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mkdir -p $@
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run:
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python3 tests/python/test_tsim.py | grep PASS
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clean:
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-rm -rf $(BUILD_DIR)

‎vta/apps/tsim_example/README.md‎

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<!--- Licensed to the Apache Software Foundation (ASF) under one -->
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<!--- or more contributor license agreements. See the NOTICE file -->
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<!--- distributed with this work for additional information -->
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<!--- regarding copyright ownership. The ASF licenses this file -->
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<!--- to you under the Apache License, Version 2.0 (the -->
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<!--- "License"); you may not use this file except in compliance -->
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<!--- with the License. You may obtain a copy of the License at -->
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<!--- http://www.apache.org/licenses/LICENSE-2.0 -->
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<!--- Unless required by applicable law or agreed to in writing, -->
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<!--- software distributed under the License is distributed on an -->
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<!--- "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY -->
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<!--- KIND, either express or implied. See the License for the -->
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<!--- specific language governing permissions and limitations -->
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<!--- under the License. -->
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VTA TSIM Installation
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======================
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*TSIM* is a cycle-accurate hardware simulation environment that can be invoked and managed directly from TVM. It aims to enable cycle accurate simulation of deep learning accelerators including VTA.
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This simulation environment can be used in both OSX and Linux.
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There are two dependencies required to make *TSIM* works: [Verilator](https://www.veripool.org/wiki/verilator) and [sbt](https://www.scala-sbt.org/) for accelerators designed in [Chisel3](https://github.com/freechipsproject/chisel3).
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## OSX Dependencies
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Install `sbt` and `verilator` using [Homebrew](https://brew.sh/).
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```bash
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brew install verilator sbt
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```
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## Linux Dependencies
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Add `sbt` to package manager (Ubuntu).
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```bash
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echo "deb https://dl.bintray.com/sbt/debian /" | sudo tee -a /etc/apt/sources.list.d/sbt.list
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sudo apt-key adv --keyserver hkp://keyserver.ubuntu.com:80 --recv 2EE0EA64E40A89B84B2DF73499E82A75642AC823
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sudo apt-get update
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```
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Install `sbt` and `verilator`.
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```bash
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sudo apt install verilator sbt
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```
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## Setup in TVM
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1. Install `verilator` and `sbt` as described above
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2. Enable VTA TSIM by turning on the switch `USE_VTA_TSIM` in config.cmake
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3. Build tvm
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## How to run VTA TSIM examples
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There are two sample VTA accelerators (add-by-one) designed in Chisel3 and Verilog to show how *TSIM* works.
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These examples are located at `<tvm-root>/vta/apps/tsim_example`.
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* Instructions
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* Open `<tvm-root>/vta/apps/tsim_example/python/tsim/config.json`
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* Change `TARGET` from `verilog` to `chisel`, depending on what language backend you would like to test
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* Go to `tvm/vta/apps/tsim`
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* Run `make`
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* Some pointers
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* Build cmake script for driver `<tvm-root>/vta/apps/tsim_example/cmake/modules/driver.cmake`
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* Build cmake script for tsim `<tvm-root>/vta/apps/tsim_example/cmake/modules/tsim.cmake`
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* Software driver that handles the VTA accelerator `<tvm-root>/vta/apps/tsim_example/src/driver.cc`
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* VTA add-by-one accelerator (Verilog) `<tvm-root>/vta/apps/tsim_example/hardware/verilog`
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* VTA add-by-one accelerator (Chisel) `<tvm-root>/vta/apps/tsim_example/hardware/chisel`

‎vta/apps/tsim_example/cmake/modules/driver.cmake‎

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# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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file(GLOB TSIM_SW_SRC src/driver.cc)
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add_library(driver SHARED ${TSIM_SW_SRC})
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target_include_directories(driver PRIVATE ${VTA_DIR}/include)
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if(APPLE)
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set_target_properties(driver PROPERTIES LINK_FLAGS "-undefined dynamic_lookup")
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endif(APPLE)

‎vta/apps/tsim_example/cmake/modules/tsim.cmake‎

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# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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if(MSVC)
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message(STATUS "TSIM build is skipped in Windows..")
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else()
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find_program(PYTHON NAMES python python3 python3.6)
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find_program(VERILATOR NAMES verilator)
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if (VERILATOR AND PYTHON)
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if (TSIM_TOP_NAME STREQUAL "")
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message(FATAL_ERROR "TSIM_TOP_NAME should be defined")
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endif()
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if (TSIM_BUILD_NAME STREQUAL "")
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message(FATAL_ERROR "TSIM_BUILD_NAME should be defined")
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endif()
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set(TSIM_CONFIG ${PYTHON} ${CMAKE_CURRENT_SOURCE_DIR}/python/tsim/config.py)
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execute_process(COMMAND ${TSIM_CONFIG} --get-target OUTPUT_VARIABLE __TSIM_TARGET)
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execute_process(COMMAND ${TSIM_CONFIG} --get-top-name OUTPUT_VARIABLE __TSIM_TOP_NAME)
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execute_process(COMMAND ${TSIM_CONFIG} --get-build-name OUTPUT_VARIABLE __TSIM_BUILD_NAME)
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execute_process(COMMAND ${TSIM_CONFIG} --get-use-trace OUTPUT_VARIABLE __TSIM_USE_TRACE)
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execute_process(COMMAND ${TSIM_CONFIG} --get-trace-name OUTPUT_VARIABLE __TSIM_TRACE_NAME)
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string(STRIP ${__TSIM_TARGET} TSIM_TARGET)
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string(STRIP ${__TSIM_TOP_NAME} TSIM_TOP_NAME)
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string(STRIP ${__TSIM_BUILD_NAME} TSIM_BUILD_NAME)
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string(STRIP ${__TSIM_USE_TRACE} TSIM_USE_TRACE)
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string(STRIP ${__TSIM_TRACE_NAME} TSIM_TRACE_NAME)
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set(TSIM_BUILD_DIR ${CMAKE_CURRENT_SOURCE_DIR}/${TSIM_BUILD_NAME})
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if (TSIM_TARGET STREQUAL "chisel")
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find_program(SBT NAMES sbt)
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if (SBT)
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# Install Chisel VTA package for DPI modules
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set(VTA_CHISEL_DIR ${VTA_DIR}/hardware/chisel)
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execute_process(WORKING_DIRECTORY ${VTA_CHISEL_DIR}
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COMMAND ${SBT} publishLocal RESULT_VARIABLE RETCODE)
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if (NOT RETCODE STREQUAL "0")
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message(FATAL_ERROR "[TSIM] sbt failed to install VTA scala package")
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endif()
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# Chisel - Scala to Verilog compilation
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set(TSIM_CHISEL_DIR ${CMAKE_CURRENT_SOURCE_DIR}/hardware/chisel)
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set(CHISEL_TARGET_DIR ${TSIM_BUILD_DIR}/chisel)
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set(CHISEL_OPT "test:runMain test.Elaborate --target-dir ${CHISEL_TARGET_DIR} --top-name ${TSIM_TOP_NAME}")
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execute_process(WORKING_DIRECTORY ${TSIM_CHISEL_DIR} COMMAND ${SBT} ${CHISEL_OPT} RESULT_VARIABLE RETCODE)
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if (NOT RETCODE STREQUAL "0")
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message(FATAL_ERROR "[TSIM] sbt failed to compile from Chisel to Verilog.")
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endif()
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file(GLOB VERILATOR_RTL_SRC ${CHISEL_TARGET_DIR}/*.v)
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else()
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message(FATAL_ERROR "[TSIM] sbt should be installed for Chisel")
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endif() # sbt
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elseif (TSIM_TARGET STREQUAL "verilog")
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set(VTA_VERILOG_DIR ${VTA_DIR}/hardware/chisel/src/main/resources/verilog)
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set(TSIM_VERILOG_DIR ${CMAKE_CURRENT_SOURCE_DIR}/hardware/verilog)
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file(GLOB VERILATOR_RTL_SRC ${VTA_VERILOG_DIR}/*.v ${TSIM_VERILOG_DIR}/*.v)
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else()
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message(STATUS "[TSIM] target language can be only verilog or chisel...")
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endif() # TSIM_TARGET
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if (TSIM_TARGET STREQUAL "chisel" OR TSIM_TARGET STREQUAL "verilog")
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# Check if tracing can be enabled
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if (NOT TSIM_USE_TRACE STREQUAL "OFF")
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message(STATUS "[TSIM] Verilog enable tracing")
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else()
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message(STATUS "[TSIM] Verilator disable tracing")
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endif()
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# Verilator - Verilog to C++ compilation
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set(VERILATOR_TARGET_DIR ${TSIM_BUILD_DIR}/verilator)
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set(VERILATOR_OPT +define+RANDOMIZE_GARBAGE_ASSIGN +define+RANDOMIZE_REG_INIT)
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list(APPEND VERILATOR_OPT +define+RANDOMIZE_MEM_INIT --x-assign unique)
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list(APPEND VERILATOR_OPT --output-split 20000 --output-split-cfuncs 20000)
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list(APPEND VERILATOR_OPT --top-module ${TSIM_TOP_NAME} -Mdir ${VERILATOR_TARGET_DIR})
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list(APPEND VERILATOR_OPT --cc ${VERILATOR_RTL_SRC})
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if (NOT TSIM_USE_TRACE STREQUAL "OFF")
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list(APPEND VERILATOR_OPT --trace)
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endif()
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execute_process(COMMAND ${VERILATOR} ${VERILATOR_OPT} RESULT_VARIABLE RETCODE)
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if (NOT RETCODE STREQUAL "0")
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message(FATAL_ERROR "[TSIM] Verilator failed to compile Verilog to C++...")
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endif()
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# Build shared library (.so)
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set(VTA_HW_DPI_DIR ${VTA_DIR}/hardware/dpi)
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set(VERILATOR_INC_DIR /usr/local/share/verilator/include)
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set(VERILATOR_LIB_SRC ${VERILATOR_INC_DIR}/verilated.cpp ${VERILATOR_INC_DIR}/verilated_dpi.cpp)
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if (NOT TSIM_USE_TRACE STREQUAL "OFF")
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list(APPEND VERILATOR_LIB_SRC ${VERILATOR_INC_DIR}/verilated_vcd_c.cpp)
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endif()
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file(GLOB VERILATOR_GEN_SRC ${VERILATOR_TARGET_DIR}/*.cpp)
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file(GLOB VERILATOR_SRC ${VTA_HW_DPI_DIR}/tsim_device.cc)
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add_library(tsim SHARED ${VERILATOR_LIB_SRC} ${VERILATOR_GEN_SRC} ${VERILATOR_SRC})
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set(VERILATOR_DEF VL_TSIM_NAME=V${TSIM_TOP_NAME} VL_PRINTF=printf VM_COVERAGE=0 VM_SC=0)
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if (NOT TSIM_USE_TRACE STREQUAL "OFF")
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list(APPEND VERILATOR_DEF VM_TRACE=1 TSIM_TRACE_FILE=${TSIM_BUILD_DIR}/${TSIM_TRACE_NAME}.vcd)
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else()
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list(APPEND VERILATOR_DEF VM_TRACE=0)
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endif()
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target_compile_definitions(tsim PRIVATE ${VERILATOR_DEF})
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target_compile_options(tsim PRIVATE -Wno-sign-compare -include V${TSIM_TOP_NAME}.h)
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target_include_directories(tsim PRIVATE ${VERILATOR_TARGET_DIR} ${VERILATOR_INC_DIR} ${VERILATOR_INC_DIR}/vltstd ${VTA_DIR}/include)
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if(APPLE)
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set_target_properties(tsim PROPERTIES LINK_FLAGS "-undefined dynamic_lookup")
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endif(APPLE)
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endif() # TSIM_TARGET STREQUAL "chisel" OR TSIM_TARGET STREQUAL "verilog"
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else()
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message(STATUS "[TSIM] could not find Python or Verilator, build is skipped...")
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endif() # VERILATOR
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endif() # MSVC

‎vta/apps/tsim_example/hardware/chisel/Makefile‎

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# Licensed to the Apache Software Foundation (ASF) under one
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# or more contributor license agreements. See the NOTICE file
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# distributed with this work for additional information
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# regarding copyright ownership. The ASF licenses this file
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# to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance
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# with the License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing,
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# software distributed under the License is distributed on an
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# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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# KIND, either express or implied. See the License for the
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# specific language governing permissions and limitations
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# under the License.
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clean:
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-rm -rf target project/target project/project

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