[microNPU] Improve cascader memory transfer estimates #10385
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Change-Id: I6771578f1007b8fea02e2dec7d0c797a6ef6aa5e
Change-Id: Idadc5f354dce42c8dbcdcbe281d324adddb41ba3
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Replaced in favour of #10508 |
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This PR improves the cascader's memory transfer cycle estimates by taking memory burst length and latency into account. Buffering of weights is also more accurately modeled.