[Marvell BYOC]: Marvell AI Accelerator Integration - Phase 2 #16915
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Background:
This PR adds Marvell software runtime support as outlined in the pre-RFC here (refer to Phasing section, Phase 2): https://discuss.tvm.apache.org/t/prerfc-byoc-integrating-marvell-ml-ai-accelerator-to-the-tvm-byoc-framework/16155
Our initial PR added basic support for partitioning and compilation (#16570).
This follow up PR integrates mrvl-tmlc (Marvell's ML compiler which generates MLIP ISA) and mrvl-mlsim which is a software simulator tool to simulate the MLIP hardware. This toolchain is hosted at our MarvellMLTools GitHub repo: https://github.com/MarvellEmbeddedProcessors/MarvellMLTools
Summary of Changes:
The mrvl-tmlc compiler is invoked during compile time to generate MLIP instructions which are embedded in the runtime. The runtime then invokes the mrvl-mlsim tool to process the input, simulate the MLIP ISA instructions and return the output to the TVM runtime.