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Use ldp/stp with SIMD registers on Arm64 (#84135)
* Use ldp/stp with SIMD registers on Arm64 Use pairwise load/stores for 1. the instructions using SIMD registers ``` ldr q1, [x0, #0x20] ldr q2, [x0, #0x30] => ldp q1, q2, [x0, #0x20] ``` 2. the instructions using base and base plus immediate offset format ``` ldr w1, [x20] ldr w2, [x20, #0x04] => ldp w1, w2, [x20] ldr q1, [x0] ldr q2, [x0, #0x10] => ldp q1, q2, [x0] ``` * Incorporate review comments
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src/coreclr/jit/emitarm64.cpp

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16248,6 +16248,12 @@ bool emitter::ReplaceLdrStrWithPairInstr(
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// ldr w1, [x20, #0x14]
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// ldr w2, [x20, #0x10] => ldp w2, w1, [x20, #0x10]
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//
16251+
// ldr w1, [x20]
16252+
// ldr w2, [x20, #0x04] => ldp w1, w2, [x20]
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//
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// ldr q1, [x0, #0x20]
16255+
// ldr q2, [x0, #0x30] => ldp q1, q2, [x0, #0x20]
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//
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// Arguments:
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// ins - The instruction code
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// reg1 - Register 1 number
@@ -16291,16 +16297,21 @@ emitter::RegisterOrder emitter::IsOptimizableLdrStrWithPair(
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return eRO_none;
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}
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16294-
if ((!isGeneralRegisterOrZR(reg1)) || (!isGeneralRegisterOrZR(prevReg1)))
16300+
if ((reg1 == REG_SP) || (prevReg1 == REG_SP) || (isGeneralRegisterOrZR(reg1) != isGeneralRegisterOrZR(prevReg1)))
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{
16296-
// Either register 1 is not a general register or previous register 1 is not a general register
16297-
// or the zero register, so we cannot optimise.
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// We cannot optimise when one of the following conditions are met
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// 1. reg1 or prevReg1 is SP
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// 2. both reg1 and prevReg1 are not of the same type (SIMD or non-SIMD)
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return eRO_none;
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}
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16301-
if (lastInsFmt != fmt)
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const bool compatibleFmt = (lastInsFmt == fmt) || (lastInsFmt == IF_LS_2B && fmt == IF_LS_2A) ||
16309+
(lastInsFmt == IF_LS_2A && fmt == IF_LS_2B);
16310+
if (!compatibleFmt)
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{
16303-
// The formats of the two instructions differ.
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// We cannot optimise when all of the following conditions are met
16313+
// 1. instruction formats differ
16314+
// 2. instructions are not using "base" or "base plus immediate offset" addressing modes
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return eRO_none;
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}
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