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Add initial support for FreeBSD.arm64 (#71486)
* changes to compile runtime under FreeBSD ARM64 host * TOOLSET_PREFIX for FreeBSD host set to llvm during crossbuild * Detect FreeBSD amd64 or aarch64 message * Fix gen-dactable-rva.sh padding zeros * cross build options for FreeBSD arm64 for mono * Revert eng/native/configuretools.cmake * Try to better detect host arch under FreeBSD * Indent * Don't pad DAC_TABLE_RVA * Comment update * Add freebsd-arm64 RIDs, enable CG2 package generation for FreeBSD builds * Extra condition for mono build * Added targetos to crossgen2 command during build * Add targetos along with targetarch for crossgen2 commands * Typo fixed in comment * Set Cpsr to gp_spsr for FreeBSD/aarch64 (still crashing exception unwind) * Fix mono configure/build CPU_COUNT for FreeBSD * Use check_symbol_exists for HAVE_GNU_CPU_COUNT check * fix cross compile error * Fix build error with targetos Co-authored-by: Szczepan <[email protected]>
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-27
lines changed

23 files changed

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‎eng/native/configurecompiler.cmake‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -285,7 +285,13 @@ if (CLR_CMAKE_HOST_UNIX)
285285
clr_unknown_arch()
286286
endif()
287287
elseif(CLR_CMAKE_HOST_FREEBSD)
288-
message("Detected FreeBSD amd64")
288+
if(CLR_CMAKE_HOST_UNIX_ARM64)
289+
message("Detected FreeBSD aarch64")
290+
elseif(CLR_CMAKE_HOST_UNIX_AMD64)
291+
message("Detected FreeBSD amd64")
292+
else()
293+
message(FATAL_ERROR "Unsupported FreeBSD architecture")
294+
endif()
289295
elseif(CLR_CMAKE_HOST_NETBSD)
290296
message("Detected NetBSD amd64")
291297
elseif(CLR_CMAKE_HOST_SUNOS)

‎eng/native/configureplatform.cmake‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,13 @@ endif(CLR_CMAKE_HOST_OS STREQUAL Android)
162162

163163
if(CLR_CMAKE_HOST_OS STREQUAL FreeBSD)
164164
set(CLR_CMAKE_HOST_UNIX 1)
165-
set(CLR_CMAKE_HOST_UNIX_AMD64 1)
165+
if (CMAKE_SYSTEM_PROCESSOR STREQUAL amd64 OR CMAKE_SYSTEM_PROCESSOR STREQUAL x86_64)
166+
set(CLR_CMAKE_HOST_UNIX_AMD64 1)
167+
elseif (CMAKE_SYSTEM_PROCESSOR STREQUAL aarch64 OR CMAKE_SYSTEM_PROCESSOR STREQUAL arm64)
168+
set(CLR_CMAKE_HOST_UNIX_ARM64 1)
169+
else()
170+
clr_unknown_arch()
171+
endif()
166172
set(CLR_CMAKE_HOST_FREEBSD 1)
167173
endif(CLR_CMAKE_HOST_OS STREQUAL FreeBSD)
168174

‎src/coreclr/crossgen-corelib.proj‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@
8484
<CrossGenDllCmd>$(CrossGenDllCmd) -o:$(CoreLibOutputPath)</CrossGenDllCmd>
8585
<CrossGenDllCmd>$(CrossGenDllCmd) -r:$([MSBuild]::NormalizePath('$(BinDir)', 'IL', '*.dll'))</CrossGenDllCmd>
8686
<CrossGenDllCmd>$(CrossGenDllCmd) --targetarch:$(TargetArchitecture)</CrossGenDllCmd>
87+
<CrossGenDllCmd>$(CrossGenDllCmd) --targetos:$(TargetOS)</CrossGenDllCmd>
8788
<CrossGenDllCmd Condition="'$(UsingToolIbcOptimization)' != 'true' and '$(EnableNgenOptimization)' == 'true'">$(CrossGenDllCmd) -m:$(MergedMibcPath) --embed-pgo-data</CrossGenDllCmd>
8889
<CrossGenDllCmd>$(CrossGenDllCmd) -O</CrossGenDllCmd>
8990
<CrossGenDllCmd Condition="'$(Configuration)' == 'Debug' or '$(Configuration)' == 'Checked'">$(CrossGenDllCmd) --verify-type-and-field-layout</CrossGenDllCmd>

‎src/coreclr/inc/crosscomp.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -551,6 +551,8 @@ typedef struct _T_KNONVOLATILE_CONTEXT_POINTERS {
551551
#define DAC_CS_NATIVE_DATA_SIZE 12
552552
#elif defined(TARGET_FREEBSD) && defined(TARGET_AMD64)
553553
#define DAC_CS_NATIVE_DATA_SIZE 24
554+
#elif defined(TARGET_FREEBSD) && defined(TARGET_ARM64)
555+
#define DAC_CS_NATIVE_DATA_SIZE 24
554556
#elif defined(TARGET_LINUX) && defined(TARGET_ARM)
555557
#define DAC_CS_NATIVE_DATA_SIZE 80
556558
#elif defined(TARGET_LINUX) && defined(TARGET_ARM64)

‎src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.targets‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,7 @@ The .NET Foundation licenses this file to you under the MIT license.
214214
<IlcArg Include="@(MibcFile->'--mibc:%(Identity)')" />
215215
<IlcArg Condition="$(IlcGenerateMetadataLog) == 'true'" Include="--metadatalog:$(NativeIntermediateOutputPath)%(ManagedBinary.Filename).metadata.csv" />
216216
<IlcArg Condition="$(TargetArchitecture) != ''" Include="--targetarch:$(TargetArchitecture)" />
217+
<IlcArg Condition="$(TargetOS) != ''" Include="--targetos:$(TargetOS)" />
217218
<IlcArg Condition="$(IlcMultiModule) == 'true'" Include="--multifile" />
218219
<IlcArg Condition="$(IlcMultiModule) != 'true' and '$(IlcDehydrate)' != 'false' and '$(ControlFlowGuard)' != 'Guard'" Include="--dehydrate" />
219220
<IlcArg Condition="$(Optimize) == 'true'" Include="-O" />

‎src/coreclr/pal/inc/pal.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2619,6 +2619,8 @@ PALIMPORT BOOL PALAPI PAL_GetUnwindInfoSize(SIZE_T baseAddress, ULONG64 ehFrameH
26192619
#define PAL_CS_NATIVE_DATA_SIZE 12
26202620
#elif defined(__FreeBSD__) && defined(__x86_64__)
26212621
#define PAL_CS_NATIVE_DATA_SIZE 24
2622+
#elif defined(__FreeBSD__) && defined(HOST_ARM64)
2623+
#define PAL_CS_NATIVE_DATA_SIZE 24
26222624
#elif defined(__linux__) && defined(HOST_ARM)
26232625
#define PAL_CS_NATIVE_DATA_SIZE 80
26242626
#elif defined(__linux__) && defined(HOST_ARM64)

‎src/coreclr/pal/src/configure.cmake‎

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1340,7 +1340,13 @@ elseif(CLR_CMAKE_TARGET_FREEBSD)
13401340
set(PAL_PT_READ_D PT_READ_D)
13411341
set(PAL_PT_WRITE_D PT_WRITE_D)
13421342
set(HAS_FTRUNCATE_LENGTH_ISSUE 0)
1343-
set(BSD_REGS_STYLE "((reg).r_##rr)")
1343+
if (CLR_CMAKE_HOST_ARCH_AMD64)
1344+
set(BSD_REGS_STYLE "((reg).r_##rr)")
1345+
elseif(CLR_CMAKE_HOST_ARCH_ARM64)
1346+
set(BSD_REGS_STYLE "((reg).rr)")
1347+
else()
1348+
message(FATAL_ERROR "Unknown FreeBSD architecture")
1349+
endif()
13441350
set(HAVE_SCHED_OTHER_ASSIGNABLE 1)
13451351
elseif(CLR_CMAKE_TARGET_NETBSD)
13461352
set(DEADLOCK_WHEN_THREAD_IS_SUSPENDED_WHILE_BLOCKED_ON_MUTEX 0)

‎src/coreclr/pal/src/exception/seh-unwind.cpp‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -198,6 +198,42 @@ enum
198198
ASSIGN_REG(R29) \
199199
ASSIGN_REG(R30) \
200200
ASSIGN_REG(R31)
201+
#elif (defined(HOST_ARM64) && defined(TARGET_FREEBSD))
202+
#define ASSIGN_UNWIND_REGS \
203+
ASSIGN_REG(X0) \
204+
ASSIGN_REG(X1) \
205+
ASSIGN_REG(X2) \
206+
ASSIGN_REG(X3) \
207+
ASSIGN_REG(X4) \
208+
ASSIGN_REG(X5) \
209+
ASSIGN_REG(X6) \
210+
ASSIGN_REG(X7) \
211+
ASSIGN_REG(X8) \
212+
ASSIGN_REG(X9) \
213+
ASSIGN_REG(X10) \
214+
ASSIGN_REG(X11) \
215+
ASSIGN_REG(X12) \
216+
ASSIGN_REG(X13) \
217+
ASSIGN_REG(X14) \
218+
ASSIGN_REG(X15) \
219+
ASSIGN_REG(X16) \
220+
ASSIGN_REG(X17) \
221+
ASSIGN_REG(X18) \
222+
ASSIGN_REG(X19) \
223+
ASSIGN_REG(X20) \
224+
ASSIGN_REG(X21) \
225+
ASSIGN_REG(X22) \
226+
ASSIGN_REG(X23) \
227+
ASSIGN_REG(X24) \
228+
ASSIGN_REG(X25) \
229+
ASSIGN_REG(X26) \
230+
ASSIGN_REG(X27) \
231+
ASSIGN_REG(X28) \
232+
ASSIGN_REG(Lr) \
233+
ASSIGN_REG(Sp) \
234+
ASSIGN_REG(Pc) \
235+
ASSIGN_REG(Fp) \
236+
ASSIGN_REG(Cpsr)
201237
#else
202238
#error unsupported architecture
203239
#endif

‎src/coreclr/pal/src/include/pal/context.h‎

Lines changed: 92 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -448,7 +448,57 @@ inline void *FPREG_Xstate_Ymmh(const ucontext_t *uc)
448448

449449
#if defined(HOST_ARM64)
450450

451-
#ifndef TARGET_OSX
451+
#if defined(TARGET_FREEBSD)
452+
453+
#define MCREG_X0(mc) (mc.mc_gpregs.gp_x[0])
454+
#define MCREG_X1(mc) (mc.mc_gpregs.gp_x[1])
455+
#define MCREG_X2(mc) (mc.mc_gpregs.gp_x[2])
456+
#define MCREG_X3(mc) (mc.mc_gpregs.gp_x[3])
457+
#define MCREG_X4(mc) (mc.mc_gpregs.gp_x[4])
458+
#define MCREG_X5(mc) (mc.mc_gpregs.gp_x[5])
459+
#define MCREG_X6(mc) (mc.mc_gpregs.gp_x[6])
460+
#define MCREG_X7(mc) (mc.mc_gpregs.gp_x[7])
461+
#define MCREG_X8(mc) (mc.mc_gpregs.gp_x[8])
462+
#define MCREG_X9(mc) (mc.mc_gpregs.gp_x[9])
463+
#define MCREG_X10(mc) (mc.mc_gpregs.gp_x[10])
464+
#define MCREG_X11(mc) (mc.mc_gpregs.gp_x[11])
465+
#define MCREG_X12(mc) (mc.mc_gpregs.gp_x[12])
466+
#define MCREG_X13(mc) (mc.mc_gpregs.gp_x[13])
467+
#define MCREG_X14(mc) (mc.mc_gpregs.gp_x[14])
468+
#define MCREG_X15(mc) (mc.mc_gpregs.gp_x[15])
469+
#define MCREG_X16(mc) (mc.mc_gpregs.gp_x[16])
470+
#define MCREG_X17(mc) (mc.mc_gpregs.gp_x[17])
471+
#define MCREG_X18(mc) (mc.mc_gpregs.gp_x[18])
472+
#define MCREG_X19(mc) (mc.mc_gpregs.gp_x[19])
473+
#define MCREG_X20(mc) (mc.mc_gpregs.gp_x[20])
474+
#define MCREG_X21(mc) (mc.mc_gpregs.gp_x[21])
475+
#define MCREG_X22(mc) (mc.mc_gpregs.gp_x[22])
476+
#define MCREG_X23(mc) (mc.mc_gpregs.gp_x[23])
477+
#define MCREG_X24(mc) (mc.mc_gpregs.gp_x[24])
478+
#define MCREG_X25(mc) (mc.mc_gpregs.gp_x[25])
479+
#define MCREG_X26(mc) (mc.mc_gpregs.gp_x[26])
480+
#define MCREG_X27(mc) (mc.mc_gpregs.gp_x[27])
481+
#define MCREG_X28(mc) (mc.mc_gpregs.gp_x[28])
482+
483+
#define MCREG_Cpsr(mc) (mc.mc_gpregs.gp_spsr)
484+
#define MCREG_Lr(mc) (mc.mc_gpregs.gp_lr)
485+
#define MCREG_Sp(mc) (mc.mc_gpregs.gp_sp)
486+
#define MCREG_Pc(mc) (mc.mc_gpregs.gp_elr)
487+
#define MCREG_Fp(mc) (mc.mc_gpregs.gp_x[29])
488+
489+
inline
490+
struct fpregs* GetNativeSigSimdContext(native_context_t *mc)
491+
{
492+
return &(mc->uc_mcontext.mc_fpregs);
493+
}
494+
495+
inline
496+
const struct fpregs* GetConstNativeSigSimdContext(const native_context_t *mc)
497+
{
498+
return GetNativeSigSimdContext(const_cast<native_context_t*>(mc));
499+
}
500+
501+
#elif !defined(TARGET_OSX) // TARGET_FREEBSD
452502

453503
#define MCREG_X0(mc) ((mc).regs[0])
454504
#define MCREG_X1(mc) ((mc).regs[1])
@@ -957,6 +1007,8 @@ const VfpSigFrame* GetConstNativeSigSimdContext(const native_context_t *mc)
9571007

9581008
#ifdef HOST_64BIT
9591009

1010+
#ifdef HOST_AMD64
1011+
9601012
#define BSDREG_Rbx(reg) BSD_REGS_STYLE(reg,RBX,rbx)
9611013
#define BSDREG_Rcx(reg) BSD_REGS_STYLE(reg,RCX,rcx)
9621014
#define BSDREG_Rdx(reg) BSD_REGS_STYLE(reg,RDX,rdx)
@@ -978,6 +1030,45 @@ const VfpSigFrame* GetConstNativeSigSimdContext(const native_context_t *mc)
9781030
#define BSDREG_R15(reg) BSD_REGS_STYLE(reg,R15,r15)
9791031
#define BSDREG_EFlags(reg) BSD_REGS_STYLE(reg,RFLAGS,rflags)
9801032

1033+
#elif defined(HOST_ARM64)
1034+
1035+
#define BSDREG_X0(reg) BSD_REGS_STYLE(reg,X[0],x[0])
1036+
#define BSDREG_X1(reg) BSD_REGS_STYLE(reg,X[1],x[1])
1037+
#define BSDREG_X2(reg) BSD_REGS_STYLE(reg,X[2],x[2])
1038+
#define BSDREG_X3(reg) BSD_REGS_STYLE(reg,X[3],x[3])
1039+
#define BSDREG_X4(reg) BSD_REGS_STYLE(reg,X[4],x[4])
1040+
#define BSDREG_X5(reg) BSD_REGS_STYLE(reg,X[5],x[5])
1041+
#define BSDREG_X6(reg) BSD_REGS_STYLE(reg,X[6],x[6])
1042+
#define BSDREG_X7(reg) BSD_REGS_STYLE(reg,X[7],x[7])
1043+
#define BSDREG_X8(reg) BSD_REGS_STYLE(reg,X[8],x[8])
1044+
#define BSDREG_X9(reg) BSD_REGS_STYLE(reg,X[9],x[9])
1045+
#define BSDREG_X10(reg) BSD_REGS_STYLE(reg,X[10],x[10])
1046+
#define BSDREG_X11(reg) BSD_REGS_STYLE(reg,X[11],x[11])
1047+
#define BSDREG_X12(reg) BSD_REGS_STYLE(reg,X[12],x[12])
1048+
#define BSDREG_X13(reg) BSD_REGS_STYLE(reg,X[13],x[13])
1049+
#define BSDREG_X14(reg) BSD_REGS_STYLE(reg,X[14],x[14])
1050+
#define BSDREG_X15(reg) BSD_REGS_STYLE(reg,X[15],x[15])
1051+
#define BSDREG_X16(reg) BSD_REGS_STYLE(reg,X[16],x[16])
1052+
#define BSDREG_X17(reg) BSD_REGS_STYLE(reg,X[17],x[17])
1053+
#define BSDREG_X18(reg) BSD_REGS_STYLE(reg,X[18],x[18])
1054+
#define BSDREG_X19(reg) BSD_REGS_STYLE(reg,X[19],x[19])
1055+
#define BSDREG_X20(reg) BSD_REGS_STYLE(reg,X[20],x[20])
1056+
#define BSDREG_X21(reg) BSD_REGS_STYLE(reg,X[21],x[21])
1057+
#define BSDREG_X22(reg) BSD_REGS_STYLE(reg,X[22],x[22])
1058+
#define BSDREG_X23(reg) BSD_REGS_STYLE(reg,X[23],x[23])
1059+
#define BSDREG_X24(reg) BSD_REGS_STYLE(reg,X[24],x[24])
1060+
#define BSDREG_X25(reg) BSD_REGS_STYLE(reg,X[25],x[25])
1061+
#define BSDREG_X26(reg) BSD_REGS_STYLE(reg,X[26],x[26])
1062+
#define BSDREG_X27(reg) BSD_REGS_STYLE(reg,X[27],x[27])
1063+
#define BSDREG_X28(reg) BSD_REGS_STYLE(reg,X[28],x[28])
1064+
#define BSDREG_Pc(reg) BSD_REGS_STYLE(reg,Elr,elr)
1065+
#define BSDREG_Fp(reg) BSD_REGS_STYLE(reg,X[29],x[29])
1066+
#define BSDREG_Sp(reg) BSD_REGS_STYLE(reg,Sp,sp)
1067+
#define BSDREG_Lr(reg) BSD_REGS_STYLE(reg,Lr,lr)
1068+
#define BSDREG_Cpsr(reg) BSD_REGS_STYLE(reg,Spsr,spsr)
1069+
1070+
#endif // HOST_ARM64
1071+
9811072
#else // HOST_64BIT
9821073

9831074
#define BSDREG_Ebx(reg) BSD_REGS_STYLE(reg,EBX,ebx)

‎src/coreclr/pal/src/thread/context.cpp‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -626,6 +626,17 @@ void CONTEXTToNativeContext(CONST CONTEXT *lpContext, native_context_t *native)
626626
{
627627
*(NEON128*) &fp->__v[i] = lpContext->V[i];
628628
}
629+
#elif defined(TARGET_FREEBSD)
630+
struct fpregs* fp = GetNativeSigSimdContext(native);
631+
if (fp)
632+
{
633+
fp->fp_sr = lpContext->Fpsr;
634+
fp->fp_cr = lpContext->Fpcr;
635+
for (int i = 0; i < 32; i++)
636+
{
637+
*(NEON128*) &fp->fp_q[i] = lpContext->V[i];
638+
}
639+
}
629640
#else // TARGET_OSX
630641
fpsimd_context* fp = GetNativeSigSimdContext(native);
631642
if (fp)
@@ -777,6 +788,17 @@ void CONTEXTFromNativeContext(const native_context_t *native, LPCONTEXT lpContex
777788
{
778789
lpContext->V[i] = *(NEON128*) &fp->__v[i];
779790
}
791+
#elif defined(TARGET_FREEBSD)
792+
const struct fpregs* fp = GetConstNativeSigSimdContext(native);
793+
if (fp)
794+
{
795+
lpContext->Fpsr = fp->fp_sr;
796+
lpContext->Fpcr = fp->fp_cr;
797+
for (int i = 0; i < 32; i++)
798+
{
799+
lpContext->V[i] = *(NEON128*) &fp->fp_q[i];
800+
}
801+
}
780802
#else // TARGET_OSX
781803
const fpsimd_context* fp = GetConstNativeSigSimdContext(native);
782804
if (fp)

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