Prevent new codepaths for X86

Author: khushal1996

src/coreclr/jit/simdashwintrinsic.cpp

@@ -1181,6 +1181,7 @@ GenTree* Compiler::impSimdAsHWIntrinsicSpecial(NamedIntrinsic       intrinsic,
                 {
                     assert(sig->numArgs == 1);
                     assert(simdBaseType == TYP_DOUBLE);
+#if defined(TARGET_AMD64)
                     if (IsBaselineVector512IsaSupportedOpportunistically())
                     {
                         NamedIntrinsic intrinsic =
@@ -1190,13 +1191,15 @@ GenTree* Compiler::impSimdAsHWIntrinsicSpecial(NamedIntrinsic       intrinsic,
 
                         return gtNewSimdCvtNode(retType, op1, intrinsic, CORINFO_TYPE_LONG, simdBaseJitType, simdSize);
                     }
+#endif
                     return nullptr;
                 }
 
                 case NI_VectorT_ConvertToUInt32:
                 {
                     assert(sig->numArgs == 1);
                     assert(simdBaseType == TYP_FLOAT);
+#if defined(TARGET_AMD64)
                     if (IsBaselineVector512IsaSupportedOpportunistically())
                     {
                         NamedIntrinsic intrinsic =
@@ -1206,13 +1209,15 @@ GenTree* Compiler::impSimdAsHWIntrinsicSpecial(NamedIntrinsic       intrinsic,
 
                         return gtNewSimdCvtNode(retType, op1, intrinsic, CORINFO_TYPE_UINT, simdBaseJitType, simdSize);
                     }
+#endif
                     return nullptr;
                 }
 
                 case NI_VectorT_ConvertToUInt64:
                 {
                     assert(sig->numArgs == 1);
                     assert(simdBaseType == TYP_DOUBLE);
+#if defined(TARGET_AMD64)
                     if (IsBaselineVector512IsaSupportedOpportunistically())
                     {
                         NamedIntrinsic intrinsic =
@@ -1222,12 +1227,14 @@ GenTree* Compiler::impSimdAsHWIntrinsicSpecial(NamedIntrinsic       intrinsic,
 
                         return gtNewSimdCvtNode(retType, op1, intrinsic, CORINFO_TYPE_ULONG, simdBaseJitType, simdSize);
                     }
+#endif
                     return nullptr;
                 }
 
                 case NI_VectorT_ConvertToInt32:
                 {
                     assert(simdBaseType == TYP_FLOAT);
+#if defined(TARGET_AMD64)
                     if (IsBaselineVector512IsaSupportedOpportunistically())
                     {
                         NamedIntrinsic intrinsic =
@@ -1237,6 +1244,7 @@ GenTree* Compiler::impSimdAsHWIntrinsicSpecial(NamedIntrinsic       intrinsic,
 
                         return gtNewSimdCvtNode(retType, op1, intrinsic, CORINFO_TYPE_INT, simdBaseJitType, simdSize);
                     }
+#endif
                     return nullptr;
                 }