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arch-arm64area-crossgen2-coreclrblocking-outerloopBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsdisabled-testThe test is disabled in source code against the issueThe test is disabled in source code against the issueos-linuxLinux OS (any supported distro)Linux OS (any supported distro)os-windows
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Description
Run: runtime-coreclr outerloop 20220213.2
Failed test:
R2R-CG2 windows arm64 Checked @ Windows.10.Arm64v8.Open
- JIT\\HardwareIntrinsics\\Arm\\AdvSimd.Arm64\\AdvSimd.Arm64_Part2_ro\\AdvSimd.Arm64_Part2_ro.cmd
- JIT\\HardwareIntrinsics\\Arm\\AdvSimd.Arm64\\AdvSimd.Arm64_Part2_r\\AdvSimd.Arm64_Part2_r.cmd
R2R-CG2 windows arm64 Checked no_tiered_compilation @ Windows.10.Arm64v8.Open
- JIT\\HardwareIntrinsics\\Arm\\AdvSimd.Arm64\\AdvSimd.Arm64_Part2_ro\\AdvSimd.Arm64_Part2_ro.cmd
- JIT\\HardwareIntrinsics\\Arm\\AdvSimd.Arm64\\AdvSimd.Arm64_Part2_r\\AdvSimd.Arm64_Part2_r.cmd
R2R-CG2 Linux arm64 Checked no_tiered_compilation @ (Ubuntu.1804.Arm64.Open)[email protected]/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8-20210531091519-97d8652
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_r/AdvSimd.Arm64_Part2_r.sh
R2R-CG2 Linux arm64 Checked no_tiered_compilation @ (Alpine.314.Arm64.Open)[email protected]/dotnet-buildtools/prereqs:alpine-3.14-helix-arm64v8-20210910135810-8a6f4f3
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_r/AdvSimd.Arm64_Part2_r.sh
R2R-CG2 Linux arm64 Checked @ (Ubuntu.1804.Arm64.Open)[email protected]/dotnet-buildtools/prereqs:ubuntu-18.04-helix-arm64v8-20210531091519-97d8652
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_ro/AdvSimd.Arm64_Part2_ro.sh
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_r/AdvSimd.Arm64_Part2_r.sh
R2R-CG2 Linux arm64 Checked @ (Alpine.314.Arm64.Open)[email protected]/dotnet-buildtools/prereqs:alpine-3.14-helix-arm64v8-20210910135810-8a6f4f3
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_ro/AdvSimd.Arm64_Part2_ro.sh
- JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_Part2_r/AdvSimd.Arm64_Part2_r.sh
Error message:
Could Not Find D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\IL-CG2\composite-r2r.dll
Could Not Find D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.dll.rsp
Could Not Find D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\TestLibrary.dll.rsp
Assert failure(PID 5444 [0x00001544], Thread: 12672 [0x3180]): Verify_TypeLayout 'TestStruct' failed to verify type layout
CORECLR! LoadDynamicInfoEntry + 0x10C0 (0x00007ff8132d27d8) CORECLR! Module::FixupNativeEntry + 0x6C (0x00007ff81325077c)
CORECLR! Module::FixupDelayListAux<Module ,int (__cdecl Module::)(CORCOMPILE_IMPORT_SECTION *,unsigned __int64,unsigned __int64 *,int)> + 0x18C (0x00007ff813393094) CORECLR! ReadyToRunInfo::GetEntryPoint + 0x2F4 (0x00007ff813394224)
CORECLR! MethodDesc::GetPrecompiledR2RCode + 0x38 (0x00007ff81332e5e0) CORECLR! MethodDesc::GetPrecompiledCode + 0x28 (0x00007ff81332e3b8)
CORECLR! MethodDesc::PrepareILBasedCode + 0x2AC (0x00007ff813330404) CORECLR! MethodDesc::PrepareCode + 0x54 (0x00007ff81333014c)
CORECLR! CodeVersionManager::PublishVersionableCodeIfNecessary + 0x2A8 (0x00007ff813277100) CORECLR! MethodDesc::DoPrestub + 0x344 (0x00007ff81332c054)
File: D:\a_work\1\s\src\coreclr\vm\jitinterface.cpp Line: 13513
Image: D:\h\w\A1B208CC\p\corerun.exe
Return code: 1
Raw output file: D:\h\w\A1B208CC\w\A405093D\uploads\Reports\JIT.HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.output.txt
Raw output:
BEGIN EXECUTION
AdvSimd.Arm64_Part2_ro.dll
TestLibrary.dll
2 file(s) copied.
Response file: D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.dll.rsp
D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\IL-CG2\AdvSimd.Arm64_Part2_ro.dll
-o:D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.dll
--targetarch:arm64
--verify-type-and-field-layout
--method-layout:random
-r:D:\h\w\A1B208CC\p\System..dll
-r:D:\h\w\A1B208CC\p\Microsoft..dll
-r:D:\h\w\A1B208CC\p\mscorlib.dll
-r:D:\h\w\A1B208CC\p\netstandard.dll
-O
" "dotnet" "D:\h\w\A1B208CC\p\crossgen2\crossgen2.dll" @"D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.dll.rsp" -r:D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\IL-CG2*.dll"
Emitting R2R PE file: D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\AdvSimd.Arm64_Part2_ro.dll
Response file: D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\TestLibrary.dll.rsp
D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\IL-CG2\TestLibrary.dll
-o:D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\TestLibrary.dll
--targetarch:arm64
--verify-type-and-field-layout
--method-layout:random
-r:D:\h\w\A1B208CC\p\System..dll
-r:D:\h\w\A1B208CC\p\Microsoft..dll
-r:D:\h\w\A1B208CC\p\mscorlib.dll
-r:D:\h\w\A1B208CC\p\netstandard.dll
-O
" "dotnet" "D:\h\w\A1B208CC\p\crossgen2\crossgen2.dll" @"D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\TestLibrary.dll.rsp" -r:D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\IL-CG2*.dll"
Emitting R2R PE file: D:\h\w\A1B208CC\w\A405093D\e\JIT\HardwareIntrinsics\Arm\AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro\TestLibrary.dll
"D:\h\w\A1B208CC\p\corerun.exe" -p "System.Reflection.Metadata.MetadataUpdater.IsSupported=false" AdvSimd.Arm64_Part2_ro.dll
Supported ISAs:
AdvSimd: True
Aes: True
ArmBase: True
Stack trace
at JIT_HardwareIntrinsics._Arm_AdvSimd_Arm64_AdvSimd_Arm64_Part2_ro_AdvSimd_Arm64_Part2_ro_._Arm_AdvSimd_Arm64_AdvSimd_Arm64_Part2_ro_AdvSimd_Arm64_Part2_ro_cmd()
NOTE: AdvSimd.Arm64\AdvSimd.Arm64_Part2_r and AdvSimd.Arm64\AdvSimd.Arm64_Part2_ro are disabled by #65227.
Please re-enable these tests when the issue is fixed!
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arch-arm64area-crossgen2-coreclrblocking-outerloopBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsBlocking the 'runtime-coreclr outerloop' and 'runtime-libraries-coreclr outerloop' runsdisabled-testThe test is disabled in source code against the issueThe test is disabled in source code against the issueos-linuxLinux OS (any supported distro)Linux OS (any supported distro)os-windows