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Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Merge "ARM: Keystone DTS updates for 3.16" from Santosh Shilimkar: Keystone DTS updates for 3.16 - Few of address cell warning fixes. - Add Lamarr and Edision EVM NOR flash and NAND devices. - Update dts to make use of dma-ranges and dma-coherent properties. * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone-evm: add spi nor flash support ARM: dts: k2l-evm: add AEMIF/NAND device entry ARM: dts: k2e-evm: add AEMIF/NAND device entry ARM: dts: keystone: Update USB node for dma properties ARM: dts: keystone: Use dma-ranges property ARM: dts: keystone: add cell's information to spi nodes ARM: dts: keystone: move i2c0 device node from SoC to board files ARM: dts: keystone: add cell's information to i2c nodes ARM: dts: keystone: drop address and size cells from GIC node Signed-off-by: Olof Johansson <[email protected]>
2 parents 80c2e88 + 18131ae commit 4831ddf

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4 files changed

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‎arch/arm/boot/dts/k2e-evm.dts‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,3 +58,84 @@
5858
&usb1 {
5959
status = "okay";
6060
};
61+
62+
&i2c0 {
63+
dtt@50 {
64+
compatible = "at,24c1024";
65+
reg = <0x50>;
66+
};
67+
};
68+
69+
&aemif {
70+
cs0 {
71+
#address-cells = <2>;
72+
#size-cells = <1>;
73+
clock-ranges;
74+
ranges;
75+
76+
ti,cs-chipselect = <0>;
77+
/* all timings in nanoseconds */
78+
ti,cs-min-turnaround-ns = <12>;
79+
ti,cs-read-hold-ns = <6>;
80+
ti,cs-read-strobe-ns = <23>;
81+
ti,cs-read-setup-ns = <9>;
82+
ti,cs-write-hold-ns = <8>;
83+
ti,cs-write-strobe-ns = <23>;
84+
ti,cs-write-setup-ns = <8>;
85+
86+
nand@0,0 {
87+
compatible = "ti,keystone-nand","ti,davinci-nand";
88+
#address-cells = <1>;
89+
#size-cells = <1>;
90+
reg = <0 0 0x4000000
91+
1 0 0x0000100>;
92+
93+
ti,davinci-chipselect = <0>;
94+
ti,davinci-mask-ale = <0x2000>;
95+
ti,davinci-mask-cle = <0x4000>;
96+
ti,davinci-mask-chipsel = <0>;
97+
nand-ecc-mode = "hw";
98+
ti,davinci-ecc-bits = <4>;
99+
nand-on-flash-bbt;
100+
101+
partition@0 {
102+
label = "u-boot";
103+
reg = <0x0 0x100000>;
104+
read-only;
105+
};
106+
107+
partition@100000 {
108+
label = "params";
109+
reg = <0x100000 0x80000>;
110+
read-only;
111+
};
112+
113+
partition@180000 {
114+
label = "ubifs";
115+
reg = <0x180000 0x1FE80000>;
116+
};
117+
};
118+
};
119+
};
120+
121+
&spi0 {
122+
nor_flash: n25q128a11@0 {
123+
#address-cells = <1>;
124+
#size-cells = <1>;
125+
compatible = "Micron,n25q128a11";
126+
spi-max-frequency = <54000000>;
127+
m25p,fast-read;
128+
reg = <0>;
129+
130+
partition@0 {
131+
label = "u-boot-spl";
132+
reg = <0x0 0x80000>;
133+
read-only;
134+
};
135+
136+
partition@1 {
137+
label = "misc";
138+
reg = <0x80000 0xf80000>;
139+
};
140+
};
141+
};

‎arch/arm/boot/dts/k2hk-evm.dts‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -138,3 +138,32 @@
138138
};
139139
};
140140
};
141+
142+
&i2c0 {
143+
dtt@50 {
144+
compatible = "at,24c1024";
145+
reg = <0x50>;
146+
};
147+
};
148+
149+
&spi0 {
150+
nor_flash: n25q128a11@0 {
151+
#address-cells = <1>;
152+
#size-cells = <1>;
153+
compatible = "Micron,n25q128a11";
154+
spi-max-frequency = <54000000>;
155+
m25p,fast-read;
156+
reg = <0>;
157+
158+
partition@0 {
159+
label = "u-boot-spl";
160+
reg = <0x0 0x80000>;
161+
read-only;
162+
};
163+
164+
partition@1 {
165+
label = "misc";
166+
reg = <0x80000 0xf80000>;
167+
};
168+
};
169+
};

‎arch/arm/boot/dts/k2l-evm.dts‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,3 +35,84 @@
3535
&usb {
3636
status = "okay";
3737
};
38+
39+
&i2c0 {
40+
dtt@50 {
41+
compatible = "at,24c1024";
42+
reg = <0x50>;
43+
};
44+
};
45+
46+
&aemif {
47+
cs0 {
48+
#address-cells = <2>;
49+
#size-cells = <1>;
50+
clock-ranges;
51+
ranges;
52+
53+
ti,cs-chipselect = <0>;
54+
/* all timings in nanoseconds */
55+
ti,cs-min-turnaround-ns = <12>;
56+
ti,cs-read-hold-ns = <6>;
57+
ti,cs-read-strobe-ns = <23>;
58+
ti,cs-read-setup-ns = <9>;
59+
ti,cs-write-hold-ns = <8>;
60+
ti,cs-write-strobe-ns = <23>;
61+
ti,cs-write-setup-ns = <8>;
62+
63+
nand@0,0 {
64+
compatible = "ti,keystone-nand","ti,davinci-nand";
65+
#address-cells = <1>;
66+
#size-cells = <1>;
67+
reg = <0 0 0x4000000
68+
1 0 0x0000100>;
69+
70+
ti,davinci-chipselect = <0>;
71+
ti,davinci-mask-ale = <0x2000>;
72+
ti,davinci-mask-cle = <0x4000>;
73+
ti,davinci-mask-chipsel = <0>;
74+
nand-ecc-mode = "hw";
75+
ti,davinci-ecc-bits = <4>;
76+
nand-on-flash-bbt;
77+
78+
partition@0 {
79+
label = "u-boot";
80+
reg = <0x0 0x100000>;
81+
read-only;
82+
};
83+
84+
partition@100000 {
85+
label = "params";
86+
reg = <0x100000 0x80000>;
87+
read-only;
88+
};
89+
90+
partition@180000 {
91+
label = "ubifs";
92+
reg = <0x180000 0x7FE80000>;
93+
};
94+
};
95+
};
96+
};
97+
98+
&spi0 {
99+
nor_flash: n25q128a11@0 {
100+
#address-cells = <1>;
101+
#size-cells = <1>;
102+
compatible = "Micron,n25q128a11";
103+
spi-max-frequency = <54000000>;
104+
m25p,fast-read;
105+
reg = <0>;
106+
107+
partition@0 {
108+
label = "u-boot-spl";
109+
reg = <0x0 0x80000>;
110+
read-only;
111+
};
112+
113+
partition@1 {
114+
label = "misc";
115+
reg = <0x80000 0xf80000>;
116+
};
117+
};
118+
};

‎arch/arm/boot/dts/keystone.dtsi‎

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -28,8 +28,6 @@
2828
gic: interrupt-controller {
2929
compatible = "arm,cortex-a15-gic";
3030
#interrupt-cells = <3>;
31-
#size-cells = <0>;
32-
#address-cells = <1>;
3331
interrupt-controller;
3432
reg = <0x0 0x02561000 0x0 0x1000>,
3533
<0x0 0x02562000 0x0 0x2000>,
@@ -66,6 +64,7 @@
6664
compatible = "ti,keystone","simple-bus";
6765
interrupt-parent = <&gic>;
6866
ranges = <0x0 0x0 0x0 0xc0000000>;
67+
dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
6968

7069
rstctrl: reset-controller {
7170
compatible = "ti,keystone-reset";
@@ -102,11 +101,6 @@
102101
interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
103102
#address-cells = <1>;
104103
#size-cells = <0>;
105-
106-
dtt@50 {
107-
compatible = "at,24c1024";
108-
reg = <0x50>;
109-
};
110104
};
111105

112106
i2c1: i2c@2530400 {
@@ -115,6 +109,8 @@
115109
clock-frequency = <100000>;
116110
clocks = <&clki2c>;
117111
interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
112+
#address-cells = <1>;
113+
#size-cells = <0>;
118114
};
119115

120116
i2c2: i2c@2530800 {
@@ -123,6 +119,8 @@
123119
clock-frequency = <100000>;
124120
clocks = <&clki2c>;
125121
interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
122+
#address-cells = <1>;
123+
#size-cells = <0>;
126124
};
127125

128126
spi0: spi@21000400 {
@@ -132,6 +130,8 @@
132130
ti,davinci-spi-intr-line = <0>;
133131
interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
134132
clocks = <&clkspi>;
133+
#address-cells = <1>;
134+
#size-cells = <0>;
135135
};
136136

137137
spi1: spi@21000600 {
@@ -141,6 +141,8 @@
141141
ti,davinci-spi-intr-line = <0>;
142142
interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
143143
clocks = <&clkspi>;
144+
#address-cells = <1>;
145+
#size-cells = <0>;
144146
};
145147

146148
spi2: spi@21000800 {
@@ -150,6 +152,8 @@
150152
ti,davinci-spi-intr-line = <0>;
151153
interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
152154
clocks = <&clkspi>;
155+
#address-cells = <1>;
156+
#size-cells = <0>;
153157
};
154158

155159
usb_phy: usb_phy@2620738 {
@@ -169,6 +173,8 @@
169173
clock-names = "usb";
170174
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
171175
ranges;
176+
dma-coherent;
177+
dma-ranges;
172178
status = "disabled";
173179

174180
dwc3@2690000 {

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