diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ea02fb30ab6..15a38f61ffc 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -167,7 +167,7 @@ jobs: with: profile: minimal target: riscv32imc-unknown-none-elf - toolchain: "1.60.0" + toolchain: "1.65.0" default: true - uses: Swatinem/rust-cache@v1 - uses: actions-rs/cargo@v1 @@ -195,7 +195,7 @@ jobs: default: true ldproxy: false buildtargets: ${{ matrix.chip_features.chip }} - version: "1.60.0" + version: "1.65.0" - uses: Swatinem/rust-cache@v1 - uses: actions-rs/cargo@v1 with: diff --git a/README.md b/README.md index 2b4d1d02296..0cb2baa8546 100644 --- a/README.md +++ b/README.md @@ -76,8 +76,8 @@ There are a number of other crates within the [esp-rs organization] which can be The **M**inimum **S**upported **R**ust **V**ersions are: -- `1.60.0` for RISC-V devices (**ESP32-C2**, **ESP32-C3**) -- `1.60.0` for Xtensa devices (**ESP32**, **ESP32-S2**, **ESP32-S3**) +- `1.65.0` for RISC-V devices (**ESP32-C2**, **ESP32-C3**) +- `1.65.0` for Xtensa devices (**ESP32**, **ESP32-S2**, **ESP32-S3**) Note that targeting the Xtensa ISA currently requires the use of the [esp-rs/rust] compiler fork. The [esp-rs/rust-build] repository has pre-compiled release artifacts for most common platforms, and provides installation scripts to aid you in the process. diff --git a/esp-hal-common/Cargo.toml b/esp-hal-common/Cargo.toml index 7fdfec48d07..2be2d714ee8 100644 --- a/esp-hal-common/Cargo.toml +++ b/esp-hal-common/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL implementations for peripherals common among Espressif devices; should not be used directly" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp-hal-common/src/gpio.rs b/esp-hal-common/src/gpio.rs index 412e5172ba8..f6f8bbb4794 100644 --- a/esp-hal-common/src/gpio.rs +++ b/esp-hal-common/src/gpio.rs @@ -907,6 +907,40 @@ where } } +impl crate::peripheral::Peripheral + for GpioPin +where + RA: BankGpioRegisterAccess, + PINTYPE: PinType, +{ + type P = GpioPin; + + unsafe fn clone_unchecked(&mut self) -> Self::P { + core::ptr::read(self as *const _) + } +} + +impl crate::peripheral::Peripheral + for &mut GpioPin +where + RA: BankGpioRegisterAccess, + PINTYPE: PinType, +{ + type P = GpioPin; + + unsafe fn clone_unchecked(&mut self) -> Self::P { + core::ptr::read(*self as *const _) + } +} + +impl crate::peripheral::sealed::Sealed + for GpioPin +where + RA: BankGpioRegisterAccess, + PINTYPE: PinType, +{ +} + impl From> for GpioPin, RA, PINTYPE, GPIONUM> where diff --git a/esp-hal-common/src/i2c.rs b/esp-hal-common/src/i2c.rs index 153eec4d1d7..e6cde248b18 100644 --- a/esp-hal-common/src/i2c.rs +++ b/esp-hal-common/src/i2c.rs @@ -266,13 +266,13 @@ where /// automatically disabled when this gets dropped. pub fn new( i2c: impl Peripheral

+ 'd, - mut sda: SDA, - mut scl: SCL, + sda: impl Peripheral

+ 'd, + scl: impl Peripheral

+ 'd, frequency: HertzU32, peripheral_clock_control: &mut PeripheralClockControl, clocks: &Clocks, ) -> Self { - crate::into_ref!(i2c); + crate::into_ref!(i2c, sda, scl); enable_peripheral(&i2c, peripheral_clock_control); let mut i2c = I2C { peripheral: i2c }; diff --git a/esp-hal-common/src/i2s.rs b/esp-hal-common/src/i2s.rs index 999931ed42d..533e5d82f73 100644 --- a/esp-hal-common/src/i2s.rs +++ b/esp-hal-common/src/i2s.rs @@ -120,13 +120,29 @@ impl DataFormat { } /// Pins to use for I2S tx -pub struct PinsBclkWsDout { - pub bclk: B, - pub ws: W, - pub dout: DO, +pub struct PinsBclkWsDout<'d, B, W, DO> { + bclk: PeripheralRef<'d, B>, + ws: PeripheralRef<'d, W>, + dout: PeripheralRef<'d, DO>, } -impl I2sTxPins for PinsBclkWsDout +impl<'d, B, W, DO> PinsBclkWsDout<'d, B, W, DO> +where + B: OutputPin, + W: OutputPin, + DO: OutputPin, +{ + pub fn new( + bclk: impl Peripheral

+ 'd, + ws: impl Peripheral

+ 'd, + dout: impl Peripheral

+ 'd, + ) -> Self { + crate::into_ref!(bclk, ws, dout); + Self { bclk, ws, dout } + } +} + +impl<'d, B, W, DO> I2sTxPins for PinsBclkWsDout<'d, B, W, DO> where B: OutputPin, W: OutputPin, @@ -151,13 +167,29 @@ where } /// Pins to use for I2S rx -pub struct PinsBclkWsDin { - pub bclk: B, - pub ws: W, - pub din: DI, +pub struct PinsBclkWsDin<'d, B, W, DI> { + bclk: PeripheralRef<'d, B>, + ws: PeripheralRef<'d, W>, + din: PeripheralRef<'d, DI>, +} + +impl<'d, B, W, DI> PinsBclkWsDin<'d, B, W, DI> +where + B: OutputPin, + W: OutputPin, + DI: InputPin, +{ + pub fn new( + bclk: impl Peripheral

+ 'd, + ws: impl Peripheral

+ 'd, + din: impl Peripheral

+ 'd, + ) -> Self { + crate::into_ref!(bclk, ws, din); + Self { bclk, ws, din } + } } -impl I2sRxPins for PinsBclkWsDin +impl<'d, B, W, DI> I2sRxPins for PinsBclkWsDin<'d, B, W, DI> where B: OutputPin, W: OutputPin, @@ -183,12 +215,21 @@ where /// MCLK pin to use #[cfg(not(esp32))] -pub struct MclkPin { - pub mclk: M, +pub struct MclkPin<'d, M: OutputPin> { + mclk: PeripheralRef<'d, M>, } #[cfg(not(esp32))] -impl I2sMclkPin for MclkPin +impl<'d, M: OutputPin> MclkPin<'d, M> { + pub fn new(pin: impl Peripheral

+ 'd) -> Self { + Self { + mclk: pin.into_ref(), + } + } +} + +#[cfg(not(esp32))] +impl<'d, M> I2sMclkPin for MclkPin<'d, M> where M: OutputPin, { @@ -225,7 +266,7 @@ where buffer: BUFFER, } -impl I2sWriteDmaTransfer +impl<'d, T, P, TX, BUFFER> I2sWriteDmaTransfer where T: RegisterAccess, P: I2sTxPins, @@ -244,7 +285,7 @@ where } } -impl DmaTransfer> +impl<'d, T, P, TX, BUFFER> DmaTransfer> for I2sWriteDmaTransfer where T: RegisterAccess, @@ -272,7 +313,7 @@ where } } -impl Drop for I2sWriteDmaTransfer +impl<'d, T, P, TX, BUFFER> Drop for I2sWriteDmaTransfer where T: RegisterAccess, P: I2sTxPins, @@ -289,7 +330,7 @@ pub trait I2sWrite { } /// Initiate a DMA tx transfer -pub trait I2sWriteDma +pub trait I2sWriteDma<'d, T, P, TX, TXBUF> where T: RegisterAccess, P: I2sTxPins, @@ -329,7 +370,7 @@ where buffer: BUFFER, } -impl I2sReadDmaTransfer +impl<'d, T, P, RX, BUFFER> I2sReadDmaTransfer where T: RegisterAccess, P: I2sRxPins, @@ -369,7 +410,8 @@ where } } -impl DmaTransfer> for I2sReadDmaTransfer +impl<'d, T, P, RX, BUFFER> DmaTransfer> + for I2sReadDmaTransfer where T: RegisterAccess, P: I2sRxPins, @@ -413,7 +455,7 @@ pub trait I2sRead { } /// Initate a DMA rx transfer -pub trait I2sReadDma +pub trait I2sReadDma<'d, T, P, RX, RXBUF> where T: RegisterAccess, P: I2sRxPins, @@ -739,7 +781,7 @@ where } } -impl I2sWriteDma for I2sTx +impl<'d, T, P, TX, TXBUF> I2sWriteDma<'d, T, P, TX, TXBUF> for I2sTx where T: RegisterAccess, P: I2sTxPins, @@ -772,7 +814,7 @@ where rx_channel: RX, } -impl I2sRx +impl<'d, T, P, RX> I2sRx where T: RegisterAccess, P: I2sRxPins, @@ -885,7 +927,7 @@ where } } -impl I2sReadDma for I2sRx +impl<'d, T, P, RX, RXBUF> I2sReadDma<'d, T, P, RX, RXBUF> for I2sRx where T: RegisterAccess, P: I2sRxPins, @@ -962,13 +1004,10 @@ mod private { T: RegisterAccess + Clone, TX: Tx, { - pub fn with_pins

(self, mut pins: P) -> I2sTx + pub fn with_pins

(self, pins: P) -> I2sTx where P: I2sTxPins, { - let mut register_access = self.register_access.clone(); - pins.configure(&mut register_access); - I2sTx::new(self.register_access, pins, self.tx_channel) } } @@ -987,13 +1026,10 @@ mod private { T: RegisterAccess + Clone, RX: Rx, { - pub fn with_pins

(self, mut pins: P) -> I2sRx + pub fn with_pins

(self, pins: P) -> I2sRx where P: I2sRxPins, { - let mut register_access = self.register_access.clone(); - pins.configure(&mut register_access); - I2sRx::new(self.register_access, pins, self.rx_channel) } } diff --git a/esp-hal-common/src/ledc/channel.rs b/esp-hal-common/src/ledc/channel.rs index bf50513477a..25bff088a14 100644 --- a/esp-hal-common/src/ledc/channel.rs +++ b/esp-hal-common/src/ledc/channel.rs @@ -8,6 +8,7 @@ use super::{ }; use crate::{ gpio::{types::OutputSignal, OutputPin}, + peripheral::{Peripheral, PeripheralRef}, peripherals::ledc::RegisterBlock, }; @@ -50,7 +51,7 @@ pub mod config { } /// Channel interface -pub trait ChannelIFace<'a, S: TimerSpeed + 'a, O: OutputPin> +pub trait ChannelIFace<'a, S: TimerSpeed + 'a, O: OutputPin + 'a> where Channel<'a, S, O>: ChannelHW, { @@ -76,12 +77,13 @@ pub struct Channel<'a, S: TimerSpeed, O: OutputPin> { ledc: &'a RegisterBlock, timer: Option<&'a dyn TimerIFace>, number: Number, - output_pin: O, + output_pin: PeripheralRef<'a, O>, } impl<'a, S: TimerSpeed, O: OutputPin> Channel<'a, S, O> { /// Return a new channel - pub fn new(number: Number, output_pin: O) -> Self { + pub fn new(number: Number, output_pin: impl Peripheral

+ 'a) -> Self { + crate::into_ref!(output_pin); let ledc = unsafe { &*crate::peripherals::LEDC::ptr() }; Channel { ledc, diff --git a/esp-hal-common/src/ledc/mod.rs b/esp-hal-common/src/ledc/mod.rs index c4f241cd7c3..003971618fa 100644 --- a/esp-hal-common/src/ledc/mod.rs +++ b/esp-hal-common/src/ledc/mod.rs @@ -150,7 +150,7 @@ impl<'d> LEDC<'d> { pub fn get_channel( &self, number: channel::Number, - output_pin: O, + output_pin: impl Peripheral

+ 'd, ) -> Channel { Channel::new(number, output_pin) } diff --git a/esp-hal-common/src/mcpwm/operator.rs b/esp-hal-common/src/mcpwm/operator.rs index 6ac5bcdd8fe..5124bd99265 100644 --- a/esp-hal-common/src/mcpwm/operator.rs +++ b/esp-hal-common/src/mcpwm/operator.rs @@ -2,6 +2,7 @@ use core::marker::PhantomData; use crate::{ mcpwm::{timer::Timer, PwmPeripheral}, + peripheral::{Peripheral, PeripheralRef}, OutputPin, }; @@ -52,31 +53,34 @@ impl Operator { } /// Use the A output with the given pin and configuration - pub fn with_pin_a( + pub fn with_pin_a<'d, Pin: OutputPin>( self, - pin: Pin, + pin: impl Peripheral

+ 'd, config: PwmPinConfig, - ) -> PwmPin { + ) -> PwmPin<'d, Pin, PWM, OP, true> { PwmPin::new(pin, config) } /// Use the B output with the given pin and configuration - pub fn with_pin_b( + pub fn with_pin_b<'d, Pin: OutputPin>( self, - pin: Pin, + pin: impl Peripheral

+ 'd, config: PwmPinConfig, - ) -> PwmPin { + ) -> PwmPin<'d, Pin, PWM, OP, false> { PwmPin::new(pin, config) } /// Use both the A and the B output with the given pins and configurations - pub fn with_pins( + pub fn with_pins<'d, PinA: OutputPin, PinB: OutputPin>( self, - pin_a: PinA, + pin_a: impl Peripheral

+ 'd, config_a: PwmPinConfig, - pin_b: PinB, + pin_b: impl Peripheral

+ 'd, config_b: PwmPinConfig, - ) -> (PwmPin, PwmPin) { + ) -> ( + PwmPin<'d, PinA, PWM, OP, true>, + PwmPin<'d, PinB, PWM, OP, false>, + ) { (PwmPin::new(pin_a, config_a), PwmPin::new(pin_b, config_b)) } } @@ -110,15 +114,16 @@ impl PwmPinConfig { } /// A pin driven by an MCPWM operator -pub struct PwmPin { - _pin: Pin, +pub struct PwmPin<'d, Pin, PWM, const OP: u8, const IS_A: bool> { + _pin: PeripheralRef<'d, Pin>, phantom: PhantomData, } -impl - PwmPin +impl<'d, Pin: OutputPin, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> + PwmPin<'d, Pin, PWM, OP, IS_A> { - fn new(mut pin: Pin, config: PwmPinConfig) -> Self { + fn new(pin: impl Peripheral

+ 'd, config: PwmPinConfig) -> Self { + crate::into_ref!(pin); let output_signal = PWM::output_signal::(); pin.enable_output(true) .connect_peripheral_to_output(output_signal); diff --git a/esp-hal-common/src/otg_fs.rs b/esp-hal-common/src/otg_fs.rs index 8fd41e9adc6..c2d706387c8 100644 --- a/esp-hal-common/src/otg_fs.rs +++ b/esp-hal-common/src/otg_fs.rs @@ -4,9 +4,9 @@ pub use esp_synopsys_usb_otg::UsbBus; use esp_synopsys_usb_otg::UsbPeripheral; use crate::{ - peripheral::PeripheralRef, + peripheral::{Peripheral, PeripheralRef}, peripherals, - system::{Peripheral, PeripheralClockControl}, + system::{Peripheral as PeripheralEnable, PeripheralClockControl}, types::InputSignal, }; @@ -26,9 +26,9 @@ where M: UsbDm + Send + Sync, { _usb0: PeripheralRef<'d, peripherals::USB0>, - _usb_sel: S, - _usb_dp: P, - _usb_dm: M, + _usb_sel: PeripheralRef<'d, S>, + _usb_dp: PeripheralRef<'d, P>, + _usb_dm: PeripheralRef<'d, M>, } impl<'d, S, P, M> USB<'d, S, P, M> @@ -38,13 +38,14 @@ where M: UsbDm + Send + Sync, { pub fn new( - usb0: impl crate::peripheral::Peripheral

+ 'd, - usb_sel: S, - usb_dp: P, - usb_dm: M, + usb0: impl Peripheral

+ 'd, + usb_sel: impl Peripheral

+ 'd, + usb_dp: impl Peripheral

+ 'd, + usb_dm: impl Peripheral

+ 'd, peripheral_clock_control: &mut PeripheralClockControl, ) -> Self { - peripheral_clock_control.enable(Peripheral::Usb); + crate::into_ref!(usb_sel, usb_dp, usb_dm); + peripheral_clock_control.enable(PeripheralEnable::Usb); Self { _usb0: usb0.into_ref(), _usb_sel: usb_sel, diff --git a/esp-hal-common/src/peripheral.rs b/esp-hal-common/src/peripheral.rs index 52cb5c46979..b2332042b83 100644 --- a/esp-hal-common/src/peripheral.rs +++ b/esp-hal-common/src/peripheral.rs @@ -301,7 +301,8 @@ mod peripheral_macros { macro_rules! into_ref { ($($name:ident),*) => { $( - let $name = $name.into_ref(); + #[allow(unused_mut)] + let mut $name = $name.into_ref(); )* } } diff --git a/esp-hal-common/src/pulse_control.rs b/esp-hal-common/src/pulse_control.rs index 1dcd38ba8b8..80a6740e5c2 100644 --- a/esp-hal-common/src/pulse_control.rs +++ b/esp-hal-common/src/pulse_control.rs @@ -211,7 +211,12 @@ impl From for u32 { } /// Functionality that every OutputChannel must support -pub trait OutputChannel { +pub trait OutputChannel { + /// Output channel type + type ConfiguredChannel<'d, P> + where + P: OutputPin + 'd; + /// Set the logical level that the connected pin is pulled to /// while the channel is idle fn set_idle_output_level(&mut self, level: bool) -> &mut Self; @@ -231,11 +236,10 @@ pub trait OutputChannel { fn set_clock_source(&mut self, source: ClockSource) -> &mut Self; /// Assign a pin that should be driven by this channel - /// - /// (Note that we only take a reference here, so the ownership remains with - /// the calling entity. The configured pin thus can be re-configured - /// independently.) - fn assign_pin(self, pin: RmtPin) -> CC; + fn assign_pin<'d, P: OutputPin>( + self, + pin: impl Peripheral

+ 'd, + ) -> Self::ConfiguredChannel<'d, P>; } /// Functionality that is allowed only on `ConfiguredChannel` @@ -359,11 +363,12 @@ macro_rules! channel_instance { paste!( #[doc = "Wrapper for`" $cxi "` object."] - pub struct [] { + pub struct []<'d, P> { channel: $cxi, + _pin: PeripheralRef<'d, P> } - impl ConfiguredChannel for [] { + impl<'d, P: OutputPin> ConfiguredChannel for []<'d, P> { /// Send a pulse sequence in a blocking fashion fn send_pulse_sequence( &mut self, @@ -651,7 +656,11 @@ macro_rules! output_channel { ) => { paste!( - impl OutputChannel<[]> for $cxi { + impl OutputChannel for $cxi { + + type ConfiguredChannel<'d, P> = []<'d, P> + where P: OutputPin + 'd; + /// Set the logical level that the connected pin is pulled to /// while the channel is idle #[inline(always)] @@ -737,16 +746,18 @@ macro_rules! output_channel { } /// Assign a pin that should be driven by this channel - fn assign_pin( + fn assign_pin<'d, RmtPin: OutputPin >( self, - mut pin: RmtPin, - ) -> [] { + pin: impl Peripheral

+ 'd + ) -> []<'d, RmtPin> { + crate::into_ref!(pin); // Configure Pin as output anc connect to signal pin.set_to_push_pull_output() .connect_peripheral_to_output($output_signal); [] { channel: self, + _pin: pin } } } diff --git a/esp-hal-common/src/spi.rs b/esp-hal-common/src/spi.rs index 36c16d29e4a..88842e4d295 100644 --- a/esp-hal-common/src/spi.rs +++ b/esp-hal-common/src/spi.rs @@ -115,16 +115,16 @@ where /// Constructs an SPI instance in 8bit dataframe mode. pub fn new( spi: impl Peripheral

+ 'd, - mut sck: SCK, - mut mosi: MOSI, - mut miso: MISO, - mut cs: CS, + sck: impl Peripheral

+ 'd, + mosi: impl Peripheral

+ 'd, + miso: impl Peripheral

+ 'd, + cs: impl Peripheral

+ 'd, frequency: HertzU32, mode: SpiMode, peripheral_clock_control: &mut PeripheralClockControl, clocks: &Clocks, ) -> Self { - crate::into_ref!(spi); + crate::into_ref!(spi, sck, mosi, miso, cs); sck.set_to_push_pull_output() .connect_peripheral_to_output(spi.sclk_signal()); @@ -143,15 +143,15 @@ where /// Constructs an SPI instance in 8bit dataframe mode without CS pin. pub fn new_no_cs( spi: impl Peripheral

+ 'd, - mut sck: SCK, - mut mosi: MOSI, - mut miso: MISO, + sck: impl Peripheral

+ 'd, + mosi: impl Peripheral

+ 'd, + miso: impl Peripheral

+ 'd, frequency: HertzU32, mode: SpiMode, peripheral_clock_control: &mut PeripheralClockControl, clocks: &Clocks, ) -> Self { - crate::into_ref!(spi); + crate::into_ref!(spi, sck, mosi, miso); sck.set_to_push_pull_output() .connect_peripheral_to_output(spi.sclk_signal()); @@ -168,14 +168,14 @@ where /// pin. pub fn new_no_cs_no_miso( spi: impl Peripheral

+ 'd, - mut sck: SCK, - mut mosi: MOSI, + sck: impl Peripheral

+ 'd, + mosi: impl Peripheral

+ 'd, frequency: HertzU32, mode: SpiMode, peripheral_clock_control: &mut PeripheralClockControl, clocks: &Clocks, ) -> Self { - crate::into_ref!(spi); + crate::into_ref!(spi, sck, mosi); sck.set_to_push_pull_output() .connect_peripheral_to_output(spi.sclk_signal()); @@ -191,13 +191,13 @@ where /// waveforms…) pub fn new_mosi_only( spi: impl Peripheral

+ 'd, - mut mosi: MOSI, + mosi: impl Peripheral

+ 'd, frequency: HertzU32, mode: SpiMode, peripheral_clock_control: &mut PeripheralClockControl, clocks: &Clocks, ) -> Self { - crate::into_ref!(spi); + crate::into_ref!(spi, mosi); mosi.set_to_push_pull_output() .connect_peripheral_to_output(spi.mosi_signal()); diff --git a/esp-hal-common/src/uart.rs b/esp-hal-common/src/uart.rs index 5848430deef..bc10e55a299 100644 --- a/esp-hal-common/src/uart.rs +++ b/esp-hal-common/src/uart.rs @@ -144,16 +144,22 @@ pub trait UartPins { } /// All pins offered by UART -pub struct AllPins { - pub tx: Option, - pub rx: Option, - pub cts: Option, - pub rts: Option, +pub struct AllPins<'d, TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin> { + pub(crate) tx: Option>, + pub(crate) rx: Option>, + pub(crate) cts: Option>, + pub(crate) rts: Option>, } /// Tx and Rx pins -impl AllPins { - pub fn new(tx: TX, rx: RX, cts: CTS, rts: RTS) -> AllPins { +impl<'d, TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin> AllPins<'d, TX, RX, CTS, RTS> { + pub fn new( + tx: impl Peripheral

+ 'd, + rx: impl Peripheral

+ 'd, + cts: impl Peripheral

+ 'd, + rts: impl Peripheral

+ 'd, + ) -> AllPins<'d, TX, RX, CTS, RTS> { + crate::into_ref!(tx, rx, cts, rts); AllPins { tx: Some(tx), rx: Some(rx), @@ -164,7 +170,7 @@ impl AllPins UartPins - for AllPins + for AllPins<'_, TX, RX, CTS, RTS> { fn configure_pins( &mut self, @@ -193,13 +199,17 @@ impl UartPins } } -pub struct TxRxPins { - pub tx: Option, - pub rx: Option, +pub struct TxRxPins<'d, TX: OutputPin, RX: InputPin> { + pub tx: Option>, + pub rx: Option>, } -impl TxRxPins { - pub fn new_tx_rx(tx: TX, rx: RX) -> TxRxPins { +impl<'d, TX: OutputPin, RX: InputPin> TxRxPins<'d, TX, RX> { + pub fn new_tx_rx( + tx: impl Peripheral

+ 'd, + rx: impl Peripheral

+ 'd, + ) -> TxRxPins<'d, TX, RX> { + crate::into_ref!(tx, rx); TxRxPins { tx: Some(tx), rx: Some(rx), @@ -207,7 +217,7 @@ impl TxRxPins { } } -impl UartPins for TxRxPins { +impl UartPins for TxRxPins<'_, TX, RX> { fn configure_pins( &mut self, tx_signal: OutputSignal, diff --git a/esp-hal-common/src/utils/smart_leds_adapter.rs b/esp-hal-common/src/utils/smart_leds_adapter.rs index c61c802b969..ebed154615a 100644 --- a/esp-hal-common/src/utils/smart_leds_adapter.rs +++ b/esp-hal-common/src/utils/smart_leds_adapter.rs @@ -11,7 +11,7 @@ //! in a sequence in a single RMT send operation) might be required!_ #![deny(missing_docs)] -use core::{marker::PhantomData, slice::IterMut}; +use core::slice::IterMut; use fugit::NanosDuration; use smart_leds_trait::{SmartLedsWrite, RGB8}; @@ -20,6 +20,7 @@ use smart_leds_trait::{SmartLedsWrite, RGB8}; use crate::pulse_control::ClockSource; use crate::{ gpio::OutputPin, + peripheral::Peripheral, pulse_control::{ConfiguredChannel, OutputChannel, PulseCode, RepeatMode, TransmissionError}, }; @@ -75,30 +76,28 @@ macro_rules! smartLedAdapter { // * channels (r,g,b -> 3) // * pulses per channel 8) // ) + 1 additional pulse for the end delimiter - SmartLedsAdapter::<_, _, { $buffer_size * 24 + 1 }> + SmartLedsAdapter::<_, { $buffer_size * 24 + 1 }> }; } /// Adapter taking an RMT channel and a specific pin and providing RGB LED /// interaction functionality using the `smart-leds` crate -pub struct SmartLedsAdapter { +pub struct SmartLedsAdapter { channel: CHANNEL, rmt_buffer: [u32; BUFFER_SIZE], - _pin: PhantomData, } -impl SmartLedsAdapter +impl<'d, CHANNEL, const BUFFER_SIZE: usize> SmartLedsAdapter where CHANNEL: ConfiguredChannel, - PIN: OutputPin, { /// Create a new adapter object that drives the pin using the RMT channel. - pub fn new( + pub fn new( mut channel: UnconfiguredChannel, - pin: PIN, - ) -> SmartLedsAdapter + pin: impl Peripheral

+ 'd, + ) -> SmartLedsAdapter where - UnconfiguredChannel: OutputChannel, + UnconfiguredChannel: OutputChannel = CHANNEL>, { #[cfg(any(esp32c3, esp32s3))] channel @@ -119,7 +118,6 @@ where Self { channel, rmt_buffer: [0; BUFFER_SIZE], - _pin: PhantomData, } } @@ -127,15 +125,9 @@ where value: RGB8, mut_iter: &mut IterMut, ) -> Result<(), LedAdapterError> { - SmartLedsAdapter::::convert_rgb_channel_to_pulses( - value.g, mut_iter, - )?; - SmartLedsAdapter::::convert_rgb_channel_to_pulses( - value.r, mut_iter, - )?; - SmartLedsAdapter::::convert_rgb_channel_to_pulses( - value.b, mut_iter, - )?; + SmartLedsAdapter::::convert_rgb_channel_to_pulses(value.g, mut_iter)?; + SmartLedsAdapter::::convert_rgb_channel_to_pulses(value.r, mut_iter)?; + SmartLedsAdapter::::convert_rgb_channel_to_pulses(value.b, mut_iter)?; Ok(()) } @@ -168,11 +160,9 @@ where } } -impl SmartLedsWrite - for SmartLedsAdapter +impl SmartLedsWrite for SmartLedsAdapter where CHANNEL: ConfiguredChannel, - PIN: OutputPin, { type Error = LedAdapterError; type Color = RGB8; @@ -192,7 +182,7 @@ where // This will result in an `BufferSizeExceeded` error in case // the iterator provides more elements than the buffer can take. for item in iterator { - SmartLedsAdapter::::convert_rgb_to_pulse( + SmartLedsAdapter::::convert_rgb_to_pulse( item.into(), &mut seq_iter, )?; diff --git a/esp-hal-procmacros/Cargo.toml b/esp-hal-procmacros/Cargo.toml index bd4f6206159..c1a5ed6e49e 100644 --- a/esp-hal-procmacros/Cargo.toml +++ b/esp-hal-procmacros/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "Procedural macros for ESP-HAL" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32-hal/Cargo.toml b/esp32-hal/Cargo.toml index 0b1dd4c7dbd..f6134673532 100644 --- a/esp32-hal/Cargo.toml +++ b/esp32-hal/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL for ESP32 microcontrollers" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32-hal/examples/i2s_read.rs b/esp32-hal/examples/i2s_read.rs index 2f7d0996582..5ff4e243c3f 100644 --- a/esp32-hal/examples/i2s_read.rs +++ b/esp32-hal/examples/i2s_read.rs @@ -66,11 +66,11 @@ fn main() -> ! { &clocks, ); - let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin { - bclk: io.pins.gpio12, - ws: io.pins.gpio13, - din: io.pins.gpio17, - }); + let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin::new( + io.pins.gpio12, + io.pins.gpio13, + io.pins.gpio17, + )); let buffer = dma_buffer(); diff --git a/esp32-hal/examples/i2s_sound.rs b/esp32-hal/examples/i2s_sound.rs index 7ecec89eb84..0a5afbfaea9 100644 --- a/esp32-hal/examples/i2s_sound.rs +++ b/esp32-hal/examples/i2s_sound.rs @@ -89,11 +89,11 @@ fn main() -> ! { &clocks, ); - let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout { - bclk: io.pins.gpio12, - ws: io.pins.gpio13, - dout: io.pins.gpio14, - }); + let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout::new( + io.pins.gpio12, + io.pins.gpio13, + io.pins.gpio14, + )); let data = unsafe { core::slice::from_raw_parts(&SINE as *const _ as *const u8, SINE.len() * 2) }; diff --git a/esp32c2-hal/Cargo.toml b/esp32c2-hal/Cargo.toml index 5be9b19c0e6..b08615fbe58 100644 --- a/esp32c2-hal/Cargo.toml +++ b/esp32c2-hal/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL for ESP32-C2 microcontrollers" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32c3-hal/Cargo.toml b/esp32c3-hal/Cargo.toml index 1514ecae8a8..f938f52c428 100644 --- a/esp32c3-hal/Cargo.toml +++ b/esp32c3-hal/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL for ESP32-C3 microcontrollers" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32c3-hal/examples/i2s_read.rs b/esp32c3-hal/examples/i2s_read.rs index 06fd660769a..94ccfb42900 100644 --- a/esp32c3-hal/examples/i2s_read.rs +++ b/esp32c3-hal/examples/i2s_read.rs @@ -57,9 +57,7 @@ fn main() -> ! { let i2s = I2s::new( peripherals.I2S, - MclkPin { - mclk: io.pins.gpio4, - }, + MclkPin::new(io.pins.gpio4), Standard::Philips, DataFormat::Data16Channel16, 44100u32.Hz(), @@ -73,11 +71,11 @@ fn main() -> ! { &clocks, ); - let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - din: io.pins.gpio5, - }); + let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio5, + )); let buffer = dma_buffer(); diff --git a/esp32c3-hal/examples/i2s_sound.rs b/esp32c3-hal/examples/i2s_sound.rs index 8393d5d49ce..6bc5d4739f9 100644 --- a/esp32c3-hal/examples/i2s_sound.rs +++ b/esp32c3-hal/examples/i2s_sound.rs @@ -80,9 +80,7 @@ fn main() -> ! { let i2s = I2s::new( peripherals.I2S, - MclkPin { - mclk: io.pins.gpio4, - }, + MclkPin::new(io.pins.gpio4), Standard::Philips, DataFormat::Data16Channel16, 44100u32.Hz(), @@ -96,11 +94,11 @@ fn main() -> ! { &clocks, ); - let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - dout: io.pins.gpio3, - }); + let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio3, + )); let data = unsafe { core::slice::from_raw_parts(&SINE as *const _ as *const u8, SINE.len() * 2) }; diff --git a/esp32s2-hal/Cargo.toml b/esp32s2-hal/Cargo.toml index dce20d6ce96..bd59c30bbc3 100644 --- a/esp32s2-hal/Cargo.toml +++ b/esp32s2-hal/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL for ESP32-S2 microcontrollers" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32s2-hal/examples/i2s_read.rs b/esp32s2-hal/examples/i2s_read.rs index c08db6d1123..5398b403846 100644 --- a/esp32s2-hal/examples/i2s_read.rs +++ b/esp32s2-hal/examples/i2s_read.rs @@ -66,11 +66,11 @@ fn main() -> ! { &clocks, ); - let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - din: io.pins.gpio5, - }); + let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio5, + )); let buffer = dma_buffer(); diff --git a/esp32s2-hal/examples/i2s_sound.rs b/esp32s2-hal/examples/i2s_sound.rs index 94d94df487b..b262ec2cfa4 100644 --- a/esp32s2-hal/examples/i2s_sound.rs +++ b/esp32s2-hal/examples/i2s_sound.rs @@ -76,9 +76,7 @@ fn main() -> ! { let i2s = I2s::new( peripherals.I2S, - MclkPin { - mclk: io.pins.gpio4, - }, + MclkPin::new(io.pins.gpio4), Standard::Philips, DataFormat::Data16Channel16, 44100u32.Hz(), @@ -92,11 +90,11 @@ fn main() -> ! { &clocks, ); - let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - dout: io.pins.gpio3, - }); + let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio3, + )); let data = unsafe { core::slice::from_raw_parts(&SINE as *const _ as *const u8, SINE.len() * 2) }; diff --git a/esp32s3-hal/Cargo.toml b/esp32s3-hal/Cargo.toml index 2364a8c15c5..97e19edcd0b 100644 --- a/esp32s3-hal/Cargo.toml +++ b/esp32s3-hal/Cargo.toml @@ -6,7 +6,7 @@ authors = [ "Björn Quentin ", ] edition = "2021" -rust-version = "1.60.0" +rust-version = "1.65.0" description = "HAL for ESP32-S3 microcontrollers" repository = "https://github.com/esp-rs/esp-hal" license = "MIT OR Apache-2.0" diff --git a/esp32s3-hal/examples/i2s_read.rs b/esp32s3-hal/examples/i2s_read.rs index b711769ffbc..46d20a0281c 100644 --- a/esp32s3-hal/examples/i2s_read.rs +++ b/esp32s3-hal/examples/i2s_read.rs @@ -57,9 +57,7 @@ fn main() -> ! { let i2s = I2s::new( peripherals.I2S0, - MclkPin { - mclk: io.pins.gpio4, - }, + MclkPin::new(io.pins.gpio4), Standard::Philips, DataFormat::Data16Channel16, 44100u32.Hz(), @@ -73,11 +71,11 @@ fn main() -> ! { &clocks, ); - let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - din: io.pins.gpio5, - }); + let i2s_rx = i2s.i2s_rx.with_pins(PinsBclkWsDin::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio5, + )); let buffer = dma_buffer(); diff --git a/esp32s3-hal/examples/i2s_sound.rs b/esp32s3-hal/examples/i2s_sound.rs index a24e1c2e273..b4ad551287c 100644 --- a/esp32s3-hal/examples/i2s_sound.rs +++ b/esp32s3-hal/examples/i2s_sound.rs @@ -80,9 +80,7 @@ fn main() -> ! { let i2s = I2s::new( peripherals.I2S0, - MclkPin { - mclk: io.pins.gpio4, - }, + MclkPin::new(io.pins.gpio4), Standard::Philips, DataFormat::Data16Channel16, 44100u32.Hz(), @@ -96,11 +94,11 @@ fn main() -> ! { &clocks, ); - let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout { - bclk: io.pins.gpio1, - ws: io.pins.gpio2, - dout: io.pins.gpio3, - }); + let i2s_tx = i2s.i2s_tx.with_pins(PinsBclkWsDout::new( + io.pins.gpio1, + io.pins.gpio2, + io.pins.gpio3, + )); let data = unsafe { core::slice::from_raw_parts(&SINE as *const _ as *const u8, SINE.len() * 2) };