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  • RiscV Rust target was only installed when installing ESP32C3. Now its also installed with ESP32C2
  • Fix espup uninstall when several RiscV targets were installed. See uninstall command fails when using multiple RiscV targets #106 for more details
  • RiscV Rust targets were not being deleted during uninstall command, now they are if a RiscV target is installed.

@SergioGasquez SergioGasquez linked an issue Dec 22, 2022 that may be closed by this pull request
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@jessebraham jessebraham left a comment

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Looks good overall, but left a few comments. Feel free to ignore them 😁

exports.extend(llvm.install()?);

if targets.contains(&Target::ESP32C3) {
if targets.contains(&Target::ESP32C3) || targets.contains(&Target::ESP32C2) {
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Maybe a nicer way of handling this (which could be done in a separate PR) would be to implement some helpers on Target to determine the architecture. As we continue to add support for addition devices we're going to keep needing to chain expressions with || here.

Maybe if we do something like this:

impl Target {
    pub fn riscv(&self) -> bool {
        !self.xtensa()
    }

    pub fn xtensa(&self) -> bool {
        matches!(self, Target::Esp32 | Target::Esp32s2 | Target::Esp32s3)
    }
}

We can then change this line (and the others like it) to something like this:

if targets.iter().any(|t| t.riscv()) {
    //
}

Just a thought, doesn't really matter right now but will likely clean things up in the future. If you don't like this idea then that is fine of course too 😁

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Thanks for the idea! It would definitely things scale better! I will address this on a different PR though. I also plan to install RISC-V GCC toolchain (riscv32-esp-elf) for ESP32-S2 and ESP32-S3 for the ULP coprocessor.

@SergioGasquez SergioGasquez merged commit 736627d into esp-rs:main Dec 23, 2022
@SergioGasquez SergioGasquez deleted the fix/riscv-uninstall branch December 23, 2022 10:40
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uninstall command fails when using multiple RiscV targets

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