[LICM] Address comments

* Simplify test Transforms/LICM/hoist-binop.ll
* Create new instructions instead of modifying in-place
* Replacing isa + dyn_cast with single dyn_cast
* Early exit
* Add test for single use case

Author: rj-jesus

llvm/lib/Transforms/Scalar/LICM.cpp

@@ -2796,55 +2796,40 @@ static bool hoistBOAssociation(Instruction &I, Loop &L,
                                ICFLoopSafetyInfo &SafetyInfo,
                                MemorySSAUpdater &MSSAU, AssumptionCache *AC,
                                DominatorTree *DT) {
-  if (!isa<BinaryOperator>(I))
+  BinaryOperator *BO = dyn_cast<BinaryOperator>(&I);
+  if (!BO || !BO->isAssociative())
     return false;
 
-  Instruction::BinaryOps Opcode = dyn_cast<BinaryOperator>(&I)->getOpcode();
-  BinaryOperator *Op0 = dyn_cast<BinaryOperator>(I.getOperand(0));
+  Instruction::BinaryOps Opcode = BO->getOpcode();
+  BinaryOperator *Op0 = dyn_cast<BinaryOperator>(BO->getOperand(0));
 
-  auto ClearSubclassDataAfterReassociation = [](Instruction &I) {
-    FPMathOperator *FPMO = dyn_cast<FPMathOperator>(&I);
-    if (!FPMO) {
-      I.clearSubclassOptionalData();
-      return;
-    }
-
-    FastMathFlags FMF = I.getFastMathFlags();
-    I.clearSubclassOptionalData();
-    I.setFastMathFlags(FMF);
-  };
-
-  if (I.isAssociative()) {
-    // Transform: "(LV op C1) op C2" ==> "LV op (C1 op C2)"
-    if (Op0 && Op0->getOpcode() == Opcode) {
-      Value *LV = Op0->getOperand(0);
-      Value *C1 = Op0->getOperand(1);
-      Value *C2 = I.getOperand(1);
+  // Transform: "(LV op C1) op C2" ==> "LV op (C1 op C2)"
+  if (Op0 && Op0->getOpcode() == Opcode) {
+    Value *LV = Op0->getOperand(0);
+    Value *C1 = Op0->getOperand(1);
+    Value *C2 = BO->getOperand(1);
 
-      if (L.isLoopInvariant(LV) || !L.isLoopInvariant(C1) ||
-          !L.isLoopInvariant(C2))
-        return false;
-
-      bool singleUseOp0 = Op0->hasOneUse();
+    if (L.isLoopInvariant(LV) || !L.isLoopInvariant(C1) ||
+        !L.isLoopInvariant(C2))
+      return false;
 
-      // Conservatively clear all optional flags since they may not be
-      // preserved by the reassociation, but preserve fast-math flags where
-      // applicable,
-      ClearSubclassDataAfterReassociation(I);
+    auto *Preheader = L.getLoopPreheader();
+    assert(Preheader && "Loop is not in simplify form?");
+    IRBuilder<> Builder(Preheader->getTerminator());
+    Value *Inv = Builder.CreateBinOp(Opcode, C1, C2, "invariant.op");
 
-      auto *Preheader = L.getLoopPreheader();
-      assert(Preheader && "Loop is not in simplify form?");
-      IRBuilder<> Builder(Preheader->getTerminator());
-      Value *V = Builder.CreateBinOp(Opcode, C1, C2, "invariant.op");
-      I.setOperand(0, LV);
-      I.setOperand(1, V);
+    auto *NewBO = BinaryOperator::Create(Opcode, LV, Inv,
+                                         BO->getName() + ".reass", BO);
+    NewBO->copyIRFlags(BO);
+    BO->replaceAllUsesWith(NewBO);
+    eraseInstruction(*BO, SafetyInfo, MSSAU);
 
-      // Note: (LV op CV1) might not be erased if it has more than one use.
-      if (singleUseOp0)
-        eraseInstruction(cast<Instruction>(*Op0), SafetyInfo, MSSAU);
+    // Note: (LV op C1) might not be erased if it has more uses than the one we
+    //       just replaced.
+    if (Op0->use_empty())
+      eraseInstruction(*Op0, SafetyInfo, MSSAU);
 
-      return true;
-    }
+    return true;
   }
 
   return false;

llvm/test/CodeGen/PowerPC/common-chain.ll

@@ -785,7 +785,7 @@ define signext i32 @spill_reduce_succ(ptr %input1, ptr %input2, ptr %output, i64
 ; CHECK-NEXT:    add r15, r5, r11
 ; CHECK-NEXT:    sldi r11, r14, 3
 ; CHECK-NEXT:    add r29, r5, r29
-; CHECK-NEXT:    add r28, r5, r26
+; CHECK-NEXT:    add r28, r3, r26
 ; CHECK-NEXT:    add r19, r5, r19
 ; CHECK-NEXT:    add r21, r23, r9
 ; CHECK-NEXT:    add r24, r23, r8
@@ -794,21 +794,21 @@ define signext i32 @spill_reduce_succ(ptr %input1, ptr %input2, ptr %output, i64
 ; CHECK-NEXT:    add r25, r23, r20
 ; CHECK-NEXT:    add r20, r18, r20
 ; CHECK-NEXT:    add r30, r5, r30
-; CHECK-NEXT:    add r18, r5, r16
+; CHECK-NEXT:    add r18, r3, r16
 ; CHECK-NEXT:    add r24, r5, r24
-; CHECK-NEXT:    add r23, r5, r21
+; CHECK-NEXT:    add r23, r3, r21
 ; CHECK-NEXT:    add r27, r4, r26
 ; CHECK-NEXT:    add r22, r4, r21
 ; CHECK-NEXT:    add r17, r4, r16
 ; CHECK-NEXT:    add r2, r4, r11
 ; CHECK-NEXT:    rldicl r4, r7, 2, 1
 ; CHECK-NEXT:    sub r7, r8, r9
 ; CHECK-NEXT:    ld r8, -200(r1) # 8-byte Folded Reload
-; CHECK-NEXT:    add r26, r3, r26
+; CHECK-NEXT:    add r26, r5, r26
 ; CHECK-NEXT:    add r25, r5, r25
-; CHECK-NEXT:    add r21, r3, r21
+; CHECK-NEXT:    add r21, r5, r21
 ; CHECK-NEXT:    add r20, r5, r20
-; CHECK-NEXT:    add r16, r3, r16
+; CHECK-NEXT:    add r16, r5, r16
 ; CHECK-NEXT:    add r31, r5, r11
 ; CHECK-NEXT:    add r11, r3, r11
 ; CHECK-NEXT:    addi r4, r4, -4
@@ -842,61 +842,61 @@ define signext i32 @spill_reduce_succ(ptr %input1, ptr %input2, ptr %output, i64
 ; CHECK-NEXT:    lfdx f1, r15, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r15, r9
-; CHECK-NEXT:    lfd f0, 0(r16)
+; CHECK-NEXT:    lfd f0, 0(r18)
 ; CHECK-NEXT:    lfd f1, 0(r17)
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
-; CHECK-NEXT:    lfdx f1, r18, r9
+; CHECK-NEXT:    lfdx f1, r16, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
-; CHECK-NEXT:    stfdx f0, r18, r9
-; CHECK-NEXT:    lfdx f0, r16, r7
+; CHECK-NEXT:    stfdx f0, r16, r9
+; CHECK-NEXT:    lfdx f0, r18, r7
 ; CHECK-NEXT:    lfdx f1, r17, r7
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r19, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r19, r9
-; CHECK-NEXT:    lfdx f0, r16, r8
+; CHECK-NEXT:    lfdx f0, r18, r8
 ; CHECK-NEXT:    lfdx f1, r17, r8
-; CHECK-NEXT:    add r16, r16, r12
+; CHECK-NEXT:    add r18, r18, r12
 ; CHECK-NEXT:    add r17, r17, r12
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r20, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r20, r9
-; CHECK-NEXT:    lfd f0, 0(r21)
+; CHECK-NEXT:    lfd f0, 0(r23)
 ; CHECK-NEXT:    lfd f1, 0(r22)
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
-; CHECK-NEXT:    lfdx f1, r23, r9
+; CHECK-NEXT:    lfdx f1, r21, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
-; CHECK-NEXT:    stfdx f0, r23, r9
-; CHECK-NEXT:    lfdx f0, r21, r7
+; CHECK-NEXT:    stfdx f0, r21, r9
+; CHECK-NEXT:    lfdx f0, r23, r7
 ; CHECK-NEXT:    lfdx f1, r22, r7
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r24, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r24, r9
-; CHECK-NEXT:    lfdx f0, r21, r8
+; CHECK-NEXT:    lfdx f0, r23, r8
 ; CHECK-NEXT:    lfdx f1, r22, r8
-; CHECK-NEXT:    add r21, r21, r12
+; CHECK-NEXT:    add r23, r23, r12
 ; CHECK-NEXT:    add r22, r22, r12
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r25, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r25, r9
-; CHECK-NEXT:    lfd f0, 0(r26)
+; CHECK-NEXT:    lfd f0, 0(r28)
 ; CHECK-NEXT:    lfd f1, 0(r27)
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
-; CHECK-NEXT:    lfdx f1, r28, r9
+; CHECK-NEXT:    lfdx f1, r26, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
-; CHECK-NEXT:    stfdx f0, r28, r9
-; CHECK-NEXT:    lfdx f0, r26, r7
+; CHECK-NEXT:    stfdx f0, r26, r9
+; CHECK-NEXT:    lfdx f0, r28, r7
 ; CHECK-NEXT:    lfdx f1, r27, r7
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r29, r9
 ; CHECK-NEXT:    xsadddp f0, f1, f0
 ; CHECK-NEXT:    stfdx f0, r29, r9
-; CHECK-NEXT:    lfdx f0, r26, r8
+; CHECK-NEXT:    lfdx f0, r28, r8
 ; CHECK-NEXT:    lfdx f1, r27, r8
-; CHECK-NEXT:    add r26, r26, r12
+; CHECK-NEXT:    add r28, r28, r12
 ; CHECK-NEXT:    add r27, r27, r12
 ; CHECK-NEXT:    xsmuldp f0, f0, f1
 ; CHECK-NEXT:    lfdx f1, r30, r9

llvm/test/Transforms/LICM/hoist-binop.ll

@@ -1,34 +1,28 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -passes=licm < %s | FileCheck %s
 
-; Adapted from
+; Adapted from:
 ;   for(long i = 0; i < n; ++i)
-;     a[i] = (i+1) * v;
-define void @test1(i64 %n) {
-; CHECK-LABEL: define void @test1(
-; CHECK-SAME: i64 [[N:%.*]]) {
+;     a[i] = (i*k) * v;
+define void @test(i64 %n, i64 %k) {
+; CHECK-LABEL: @test(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_PH:%.*]]
 ; CHECK:       for.ph:
-; CHECK-NEXT:    [[VSCALE:%.*]] = tail call i64 @llvm.vscale.i64()
-; CHECK-NEXT:    [[VSCALE_2:%.*]] = shl nuw nsw i64 [[VSCALE]], 1
-; CHECK-NEXT:    [[VSCALE_4:%.*]] = shl nuw nsw i64 [[VSCALE]], 2
-; CHECK-NEXT:    [[VEC_INIT:%.*]] = insertelement <vscale x 2 x i64> zeroinitializer, i64 1, i64 1
-; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 2 x i64> poison, i64 [[VSCALE_2]], i64 0
-; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <vscale x 2 x i64> [[DOTSPLATINSERT]], <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
-; CHECK-NEXT:    [[INVARIANT_OP:%.*]] = add <vscale x 2 x i64> [[DOTSPLAT]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i64 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
-; CHECK-NEXT:    [[INVARIANT_OP1:%.*]] = add <vscale x 2 x i64> [[DOTSPLAT]], [[DOTSPLAT]]
+; CHECK-NEXT:    [[K_2:%.*]] = shl nuw nsw i64 [[K:%.*]], 1
+; CHECK-NEXT:    [[VEC_INIT:%.*]] = insertelement <2 x i64> zeroinitializer, i64 [[K]], i64 1
+; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[K_2]], i64 0
+; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <2 x i64> [[DOTSPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT:    [[INVARIANT_OP:%.*]] = add <2 x i64> [[DOTSPLAT]], [[DOTSPLAT]]
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.body:
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[FOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <vscale x 2 x i64> [ [[VEC_INIT]], [[FOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[FOR_BODY]] ]
-; CHECK-NEXT:    [[ADD1:%.*]] = add nuw nsw <vscale x 2 x i64> [[VEC_IND]], shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i64 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
-; CHECK-NEXT:    [[ADD2:%.*]] = add <vscale x 2 x i64> [[VEC_IND]], [[INVARIANT_OP]]
-; CHECK-NEXT:    call void @use(<vscale x 2 x i64> [[ADD1]])
-; CHECK-NEXT:    call void @use(<vscale x 2 x i64> [[ADD2]])
-; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[VSCALE_4]]
-; CHECK-NEXT:    [[VEC_IND_NEXT]] = add <vscale x 2 x i64> [[VEC_IND]], [[INVARIANT_OP1]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N]]
+; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <2 x i64> [ [[VEC_INIT]], [[FOR_PH]] ], [ [[VEC_IND_NEXT_REASS:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[STEP_ADD:%.*]] = add <2 x i64> [[VEC_IND]], [[DOTSPLAT]]
+; CHECK-NEXT:    call void @use(<2 x i64> [[STEP_ADD]])
+; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT:    [[VEC_IND_NEXT_REASS]] = add <2 x i64> [[VEC_IND]], [[INVARIANT_OP]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_END:%.*]], label [[FOR_BODY]]
 ; CHECK:       for.end:
 ; CHECK-NEXT:    ret void
@@ -37,30 +31,69 @@ entry:
   br label %for.ph
 
 for.ph:
-  %vscale = tail call i64 @llvm.vscale.i64()
-  %vscale.2 = shl nuw nsw i64 %vscale, 1
-  %vscale.4 = shl nuw nsw i64 %vscale, 2
-  %vec.init = insertelement <vscale x 2 x i64> zeroinitializer, i64 1, i64 1
-  %.splatinsert = insertelement <vscale x 2 x i64> poison, i64 %vscale.2, i64 0
-  %.splat = shufflevector <vscale x 2 x i64> %.splatinsert, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
+  %k.2 = shl nuw nsw i64 %k, 1
+  %vec.init = insertelement <2 x i64> zeroinitializer, i64 %k, i64 1
+  %.splatinsert = insertelement <2 x i64> poison, i64 %k.2, i64 0
+  %.splat = shufflevector <2 x i64> %.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer
   br label %for.body
 
 for.body:
   %index = phi i64 [ 0, %for.ph ], [ %index.next, %for.body ]
-  %vec.ind = phi <vscale x 2 x i64> [ %vec.init, %for.ph ], [ %vec.ind.next, %for.body ]
-  %step.add = add <vscale x 2 x i64> %vec.ind, %.splat
-  %add1 = add nuw nsw <vscale x 2 x i64> %vec.ind, shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i64 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
-  %add2 = add nuw nsw <vscale x 2 x i64> %step.add, shufflevector (<vscale x 2 x i64> insertelement (<vscale x 2 x i64> poison, i64 1, i64 0), <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer)
-  call void @use(<vscale x 2 x i64> %add1)
-  call void @use(<vscale x 2 x i64> %add2)
-  %index.next = add nuw i64 %index, %vscale.4
-  %vec.ind.next = add <vscale x 2 x i64> %step.add, %.splat
+  %vec.ind = phi <2 x i64> [ %vec.init, %for.ph ], [ %vec.ind.next, %for.body ]
+  %step.add = add <2 x i64> %vec.ind, %.splat
+  call void @use(<2 x i64> %step.add)
+  %index.next = add nuw i64 %index, 4
+  %vec.ind.next = add <2 x i64> %step.add, %.splat
   %cmp = icmp eq i64 %index.next, %n
   br i1 %cmp, label %for.end, label %for.body
 
 for.end:
   ret void
 }
 
-declare i64 @llvm.vscale.i64()
-declare void @use(<vscale x 2 x i64>)
+; Same as above but `%step.add` is unused and thus removed.
+define void @test_single_use(i64 %n, i64 %k) {
+; CHECK-LABEL: @test_single_use(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[FOR_PH:%.*]]
+; CHECK:       for.ph:
+; CHECK-NEXT:    [[K_2:%.*]] = shl nuw nsw i64 [[K:%.*]], 1
+; CHECK-NEXT:    [[VEC_INIT:%.*]] = insertelement <2 x i64> zeroinitializer, i64 [[K]], i64 1
+; CHECK-NEXT:    [[DOTSPLATINSERT:%.*]] = insertelement <2 x i64> poison, i64 [[K_2]], i64 0
+; CHECK-NEXT:    [[DOTSPLAT:%.*]] = shufflevector <2 x i64> [[DOTSPLATINSERT]], <2 x i64> poison, <2 x i32> zeroinitializer
+; CHECK-NEXT:    [[INVARIANT_OP:%.*]] = add <2 x i64> [[DOTSPLAT]], [[DOTSPLAT]]
+; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
+; CHECK:       for.body:
+; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[FOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[VEC_IND:%.*]] = phi <2 x i64> [ [[VEC_INIT]], [[FOR_PH]] ], [ [[VEC_IND_NEXT_REASS:%.*]], [[FOR_BODY]] ]
+; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
+; CHECK-NEXT:    [[VEC_IND_NEXT_REASS]] = add <2 x i64> [[VEC_IND]], [[INVARIANT_OP]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N:%.*]]
+; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_END:%.*]], label [[FOR_BODY]]
+; CHECK:       for.end:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %for.ph
+
+for.ph:
+  %k.2 = shl nuw nsw i64 %k, 1
+  %vec.init = insertelement <2 x i64> zeroinitializer, i64 %k, i64 1
+  %.splatinsert = insertelement <2 x i64> poison, i64 %k.2, i64 0
+  %.splat = shufflevector <2 x i64> %.splatinsert, <2 x i64> poison, <2 x i32> zeroinitializer
+  br label %for.body
+
+for.body:
+  %index = phi i64 [ 0, %for.ph ], [ %index.next, %for.body ]
+  %vec.ind = phi <2 x i64> [ %vec.init, %for.ph ], [ %vec.ind.next, %for.body ]
+  %step.add = add <2 x i64> %vec.ind, %.splat
+  %index.next = add nuw i64 %index, 4
+  %vec.ind.next = add <2 x i64> %step.add, %.splat
+  %cmp = icmp eq i64 %index.next, %n
+  br i1 %cmp, label %for.end, label %for.body
+
+for.end:
+  ret void
+}
+
+declare void @use(<2 x i64>)

llvm/test/Transforms/LICM/sink-foldable.ll

@@ -79,7 +79,7 @@ define ptr @test2(i32 %j, ptr readonly %P, ptr readnone %Q) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.cond:
-; CHECK-NEXT:    [[I_ADDR_0:%.*]] = phi i32 [ [[ADD:%.*]], [[IF_END:%.*]] ]
+; CHECK-NEXT:    [[I_ADDR_0:%.*]] = phi i32 [ [[ADD_REASS:%.*]], [[IF_END:%.*]] ]
 ; CHECK-NEXT:    [[P_ADDR_0:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[IF_END]] ]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[I_ADDR_0]], [[J:%.*]]
 ; CHECK-NEXT:    br i1 [[CMP]], label [[FOR_BODY]], label [[LOOPEXIT0:%.*]]
@@ -97,7 +97,7 @@ define ptr @test2(i32 %j, ptr readonly %P, ptr readnone %Q) {
 ; CHECK-NEXT:    [[ARRAYIDX2:%.*]] = getelementptr inbounds ptr, ptr [[ADD_PTR]], i64 [[IDX2_EXT]]
 ; CHECK-NEXT:    [[L1:%.*]] = load ptr, ptr [[ARRAYIDX2]], align 8
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp ugt ptr [[L1]], [[Q]]
-; CHECK-NEXT:    [[ADD]] = add i32 [[I_ADDR]], 2
+; CHECK-NEXT:    [[ADD_REASS]] = add nsw i32 [[I_ADDR]], 2
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[LOOPEXIT2:%.*]], label [[FOR_COND]]
 ; CHECK:       loopexit0:
 ; CHECK-NEXT:    [[P0:%.*]] = phi ptr [ null, [[FOR_COND]] ]

llvm/test/Transforms/LICM/update-scev-after-hoist.ll

@@ -2,7 +2,7 @@
 
 define i16 @main() {
 ; SCEV-EXPR:      Classifying expressions for: @main
-; SCEV-EXPR-NEXT:  %mul = phi i16 [ 1, %entry ], [ %mul.n.3, %loop ]
+; SCEV-EXPR-NEXT:  %mul = phi i16 [ 1, %entry ], [ %mul.n.3.reass, %loop ]
 ; SCEV-EXPR-NEXT:  -->  %mul U: [0,-15) S: [-32768,32753)		Exits: 4096		LoopDispositions: { %loop: Variant }
 ; SCEV-EXPR-NEXT:  %div = phi i16 [ 32767, %entry ], [ %div.n.3, %loop ]
 ; SCEV-EXPR-NEXT:  -->  %div U: [-2048,-32768) S: [-2048,-32768)		Exits: 7		LoopDispositions: { %loop: Variant }