@@ -129,25 +129,69 @@ int v4() { return __builtin_cpu_supports("x86-64-v4"); }
129129// CHECK-PPC: if.else3:
130130// CHECK-PPC-NEXT: [[CPU_IS:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
131131// CHECK-PPC-NEXT: [[TMP6:%.*]] = icmp eq i32 [[CPU_IS]], 39
132- // CHECK-PPC-NEXT: br i1 [[TMP6]], label [[IF_THEN4:%.*]], label [[IF_END :%.*]]
132+ // CHECK-PPC-NEXT: br i1 [[TMP6]], label [[IF_THEN4:%.*]], label [[IF_ELSE5 :%.*]]
133133// CHECK-PPC: if.then4:
134134// CHECK-PPC-NEXT: [[TMP7:%.*]] = load i32, ptr [[A_ADDR]], align 4
135135// CHECK-PPC-NEXT: [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
136136// CHECK-PPC-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
137137// CHECK-PPC-NEXT: store i32 [[ADD]], ptr [[RETVAL]], align 4
138138// CHECK-PPC-NEXT: br label [[RETURN]]
139+ // CHECK-PPC: if.else5:
140+ // CHECK-PPC-NEXT: [[CPU_IS6:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
141+ // CHECK-PPC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[CPU_IS6]], 45
142+ // CHECK-PPC-NEXT: br i1 [[TMP9]], label [[IF_THEN7:%.*]], label [[IF_ELSE9:%.*]]
143+ // CHECK-PPC: if.then7:
144+ // CHECK-PPC-NEXT: [[TMP10:%.*]] = load i32, ptr [[A_ADDR]], align 4
145+ // CHECK-PPC-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP10]], 3
146+ // CHECK-PPC-NEXT: store i32 [[ADD8]], ptr [[RETVAL]], align 4
147+ // CHECK-PPC-NEXT: br label [[RETURN]]
148+ // CHECK-PPC: if.else9:
149+ // CHECK-PPC-NEXT: [[CPU_IS10:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
150+ // CHECK-PPC-NEXT: [[TMP11:%.*]] = icmp eq i32 [[CPU_IS10]], 46
151+ // CHECK-PPC-NEXT: br i1 [[TMP11]], label [[IF_THEN11:%.*]], label [[IF_ELSE13:%.*]]
152+ // CHECK-PPC: if.then11:
153+ // CHECK-PPC-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR]], align 4
154+ // CHECK-PPC-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP12]], 3
155+ // CHECK-PPC-NEXT: store i32 [[SUB12]], ptr [[RETVAL]], align 4
156+ // CHECK-PPC-NEXT: br label [[RETURN]]
157+ // CHECK-PPC: if.else13:
158+ // CHECK-PPC-NEXT: [[CPU_IS14:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
159+ // CHECK-PPC-NEXT: [[TMP13:%.*]] = icmp eq i32 [[CPU_IS14]], 47
160+ // CHECK-PPC-NEXT: br i1 [[TMP13]], label [[IF_THEN15:%.*]], label [[IF_ELSE17:%.*]]
161+ // CHECK-PPC: if.then15:
162+ // CHECK-PPC-NEXT: [[TMP14:%.*]] = load i32, ptr [[A_ADDR]], align 4
163+ // CHECK-PPC-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP14]], 7
164+ // CHECK-PPC-NEXT: store i32 [[ADD16]], ptr [[RETVAL]], align 4
165+ // CHECK-PPC-NEXT: br label [[RETURN]]
166+ // CHECK-PPC: if.else17:
167+ // CHECK-PPC-NEXT: [[CPU_IS18:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
168+ // CHECK-PPC-NEXT: [[TMP15:%.*]] = icmp eq i32 [[CPU_IS18]], 48
169+ // CHECK-PPC-NEXT: br i1 [[TMP15]], label [[IF_THEN19:%.*]], label [[IF_END:%.*]]
170+ // CHECK-PPC: if.then19:
171+ // CHECK-PPC-NEXT: [[TMP16:%.*]] = load i32, ptr [[A_ADDR]], align 4
172+ // CHECK-PPC-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP16]], 7
173+ // CHECK-PPC-NEXT: store i32 [[SUB20]], ptr [[RETVAL]], align 4
174+ // CHECK-PPC-NEXT: br label [[RETURN]]
139175// CHECK-PPC: if.end:
140- // CHECK-PPC-NEXT: br label [[IF_END5:%.*]]
141- // CHECK-PPC: if.end5:
142- // CHECK-PPC-NEXT: br label [[IF_END6:%.*]]
143- // CHECK-PPC: if.end6:
144- // CHECK-PPC-NEXT: [[TMP9:%.*]] = load i32, ptr [[A_ADDR]], align 4
145- // CHECK-PPC-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP9]], 5
146- // CHECK-PPC-NEXT: store i32 [[ADD7]], ptr [[RETVAL]], align 4
176+ // CHECK-PPC-NEXT: br label [[IF_END21:%.*]]
177+ // CHECK-PPC: if.end21:
178+ // CHECK-PPC-NEXT: br label [[IF_END22:%.*]]
179+ // CHECK-PPC: if.end22:
180+ // CHECK-PPC-NEXT: br label [[IF_END23:%.*]]
181+ // CHECK-PPC: if.end23:
182+ // CHECK-PPC-NEXT: br label [[IF_END24:%.*]]
183+ // CHECK-PPC: if.end24:
184+ // CHECK-PPC-NEXT: br label [[IF_END25:%.*]]
185+ // CHECK-PPC: if.end25:
186+ // CHECK-PPC-NEXT: br label [[IF_END26:%.*]]
187+ // CHECK-PPC: if.end26:
188+ // CHECK-PPC-NEXT: [[TMP17:%.*]] = load i32, ptr [[A_ADDR]], align 4
189+ // CHECK-PPC-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP17]], 5
190+ // CHECK-PPC-NEXT: store i32 [[ADD27]], ptr [[RETVAL]], align 4
147191// CHECK-PPC-NEXT: br label [[RETURN]]
148192// CHECK-PPC: return:
149- // CHECK-PPC-NEXT: [[TMP10 :%.*]] = load i32, ptr [[RETVAL]], align 4
150- // CHECK-PPC-NEXT: ret i32 [[TMP10 ]]
193+ // CHECK-PPC-NEXT: [[TMP18 :%.*]] = load i32, ptr [[RETVAL]], align 4
194+ // CHECK-PPC-NEXT: ret i32 [[TMP18 ]]
151195//
152196int test (int a ) {
153197 if (__builtin_cpu_supports ("arch_3_00" )) // HWCAP2
@@ -156,6 +200,14 @@ int test(int a) {
156200 return a - 5 ;
157201 else if (__builtin_cpu_is ("power7" )) // CPUID
158202 return a + a ;
203+ else if (__builtin_cpu_is ("power8" ))
204+ return a + 3 ;
205+ else if (__builtin_cpu_is ("power9" ))
206+ return a - 3 ;
207+ else if (__builtin_cpu_is ("power10" ))
208+ return a + 7 ;
209+ else if (__builtin_cpu_is ("power11" ))
210+ return a - 7 ;
159211 return a + 5 ;
160212}
161213#endif
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