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[AArch64][PAC] Rework discriminator analysis in AUT and AUTPAC
Make use of post-processing the discriminator components by custom inserter hook to eliminate duplication for DAGISel and GlobalISel and improve cross-BB analysis for DAGISel.
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-69
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5 files changed

+256
-69
lines changed

‎llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp‎

Lines changed: 5 additions & 46 deletions
Original file line numberDiff line numberDiff line change
@@ -1487,39 +1487,6 @@ void AArch64DAGToDAGISel::SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc,
14871487
ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, Ops));
14881488
}
14891489

1490-
static std::tuple<SDValue, SDValue>
1491-
extractPtrauthBlendDiscriminators(SDValue Disc, SelectionDAG *DAG) {
1492-
SDLoc DL(Disc);
1493-
SDValue AddrDisc;
1494-
SDValue ConstDisc;
1495-
1496-
// If this is a blend, remember the constant and address discriminators.
1497-
// Otherwise, it's either a constant discriminator, or a non-blended
1498-
// address discriminator.
1499-
if (Disc->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
1500-
Disc->getConstantOperandVal(0) == Intrinsic::ptrauth_blend) {
1501-
AddrDisc = Disc->getOperand(1);
1502-
ConstDisc = Disc->getOperand(2);
1503-
} else {
1504-
ConstDisc = Disc;
1505-
}
1506-
1507-
// If the constant discriminator (either the blend RHS, or the entire
1508-
// discriminator value) isn't a 16-bit constant, bail out, and let the
1509-
// discriminator be computed separately.
1510-
auto *ConstDiscN = dyn_cast<ConstantSDNode>(ConstDisc);
1511-
if (!ConstDiscN || !isUInt<16>(ConstDiscN->getZExtValue()))
1512-
return std::make_tuple(DAG->getTargetConstant(0, DL, MVT::i64), Disc);
1513-
1514-
// If there's no address discriminator, use XZR directly.
1515-
if (!AddrDisc)
1516-
AddrDisc = DAG->getRegister(AArch64::XZR, MVT::i64);
1517-
1518-
return std::make_tuple(
1519-
DAG->getTargetConstant(ConstDiscN->getZExtValue(), DL, MVT::i64),
1520-
AddrDisc);
1521-
}
1522-
15231490
void AArch64DAGToDAGISel::SelectPtrauthAuth(SDNode *N) {
15241491
SDLoc DL(N);
15251492
// IntrinsicID is operand #0
@@ -1530,13 +1497,11 @@ void AArch64DAGToDAGISel::SelectPtrauthAuth(SDNode *N) {
15301497
unsigned AUTKeyC = cast<ConstantSDNode>(AUTKey)->getZExtValue();
15311498
AUTKey = CurDAG->getTargetConstant(AUTKeyC, DL, MVT::i64);
15321499

1533-
SDValue AUTAddrDisc, AUTConstDisc;
1534-
std::tie(AUTConstDisc, AUTAddrDisc) =
1535-
extractPtrauthBlendDiscriminators(AUTDisc, CurDAG);
1500+
SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i64);
15361501

15371502
SDValue X16Copy = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL,
15381503
AArch64::X16, Val, SDValue());
1539-
SDValue Ops[] = {AUTKey, AUTConstDisc, AUTAddrDisc, X16Copy.getValue(1)};
1504+
SDValue Ops[] = {AUTKey, Zero, AUTDisc, X16Copy.getValue(1)};
15401505

15411506
SDNode *AUT = CurDAG->getMachineNode(AArch64::AUT, DL, MVT::i64, Ops);
15421507
ReplaceNode(N, AUT);
@@ -1557,19 +1522,13 @@ void AArch64DAGToDAGISel::SelectPtrauthResign(SDNode *N) {
15571522
AUTKey = CurDAG->getTargetConstant(AUTKeyC, DL, MVT::i64);
15581523
PACKey = CurDAG->getTargetConstant(PACKeyC, DL, MVT::i64);
15591524

1560-
SDValue AUTAddrDisc, AUTConstDisc;
1561-
std::tie(AUTConstDisc, AUTAddrDisc) =
1562-
extractPtrauthBlendDiscriminators(AUTDisc, CurDAG);
1563-
1564-
SDValue PACAddrDisc, PACConstDisc;
1565-
std::tie(PACConstDisc, PACAddrDisc) =
1566-
extractPtrauthBlendDiscriminators(PACDisc, CurDAG);
1525+
SDValue Zero = CurDAG->getTargetConstant(0, DL, MVT::i64);
15671526

15681527
SDValue X16Copy = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL,
15691528
AArch64::X16, Val, SDValue());
15701529

1571-
SDValue Ops[] = {AUTKey, AUTConstDisc, AUTAddrDisc, PACKey,
1572-
PACConstDisc, PACAddrDisc, X16Copy.getValue(1)};
1530+
SDValue Ops[] = {
1531+
AUTKey, Zero, AUTDisc, PACKey, Zero, PACDisc, X16Copy.getValue(1)};
15731532

15741533
SDNode *AUTPAC = CurDAG->getMachineNode(AArch64::AUTPAC, DL, MVT::i64, Ops);
15751534
ReplaceNode(N, AUTPAC);

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3241,10 +3241,20 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
32413241
case AArch64::MOVT_TIZ_PSEUDO:
32423242
return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
32433243

3244+
case AArch64::AUT:
3245+
fixupBlendComponents(MI, BB, MI.getOperand(1), MI.getOperand(2),
3246+
&AArch64::GPR64noipRegClass);
3247+
return BB;
32443248
case AArch64::PAC:
32453249
fixupBlendComponents(MI, BB, MI.getOperand(3), MI.getOperand(4),
32463250
&AArch64::GPR64noipRegClass);
32473251
return BB;
3252+
case AArch64::AUTPAC:
3253+
fixupBlendComponents(MI, BB, MI.getOperand(1), MI.getOperand(2),
3254+
&AArch64::GPR64noipRegClass);
3255+
fixupBlendComponents(MI, BB, MI.getOperand(4), MI.getOperand(5),
3256+
&AArch64::GPR64noipRegClass);
3257+
return BB;
32483258
}
32493259
}
32503260

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2134,6 +2134,7 @@ let Predicates = [HasPAuth] in {
21342134
let Size = 32;
21352135
let Defs = [X16,X17,NZCV];
21362136
let Uses = [X16];
2137+
let usesCustomInserter = 1;
21372138
}
21382139

21392140
// PAC pseudo instruction. Is AsmPrinter, it is expanded into an actual PAC*
@@ -2170,6 +2171,7 @@ let Predicates = [HasPAuth] in {
21702171
let Size = 48;
21712172
let Defs = [X16,X17,NZCV];
21722173
let Uses = [X16];
2174+
let usesCustomInserter = 1;
21732175
}
21742176

21752177
// Materialize a signed global address, with adrp+add and PAC.

‎llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp‎

Lines changed: 6 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -6725,25 +6725,15 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
67256725
uint64_t PACKey = I.getOperand(5).getImm();
67266726
Register PACDisc = I.getOperand(6).getReg();
67276727

6728-
Register AUTAddrDisc = AUTDisc;
6729-
uint16_t AUTConstDiscC = 0;
6730-
std::tie(AUTConstDiscC, AUTAddrDisc) =
6731-
extractPtrauthBlendDiscriminators(AUTDisc, MRI);
6732-
6733-
Register PACAddrDisc = PACDisc;
6734-
uint16_t PACConstDiscC = 0;
6735-
std::tie(PACConstDiscC, PACAddrDisc) =
6736-
extractPtrauthBlendDiscriminators(PACDisc, MRI);
6737-
67386728
MIB.buildCopy({AArch64::X16}, {ValReg});
67396729
MIB.buildInstr(TargetOpcode::IMPLICIT_DEF, {AArch64::X17}, {});
67406730
MIB.buildInstr(AArch64::AUTPAC)
67416731
.addImm(AUTKey)
6742-
.addImm(AUTConstDiscC)
6743-
.addUse(AUTAddrDisc)
6732+
.addImm(0)
6733+
.addUse(AUTDisc)
67446734
.addImm(PACKey)
6745-
.addImm(PACConstDiscC)
6746-
.addUse(PACAddrDisc)
6735+
.addImm(0)
6736+
.addUse(PACDisc)
67476737
.constrainAllUses(TII, TRI, RBI);
67486738
MIB.buildCopy({DstReg}, Register(AArch64::X16));
67496739

@@ -6757,17 +6747,12 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
67576747
uint64_t AUTKey = I.getOperand(3).getImm();
67586748
Register AUTDisc = I.getOperand(4).getReg();
67596749

6760-
Register AUTAddrDisc = AUTDisc;
6761-
uint16_t AUTConstDiscC = 0;
6762-
std::tie(AUTConstDiscC, AUTAddrDisc) =
6763-
extractPtrauthBlendDiscriminators(AUTDisc, MRI);
6764-
67656750
MIB.buildCopy({AArch64::X16}, {ValReg});
67666751
MIB.buildInstr(TargetOpcode::IMPLICIT_DEF, {AArch64::X17}, {});
67676752
MIB.buildInstr(AArch64::AUT)
67686753
.addImm(AUTKey)
6769-
.addImm(AUTConstDiscC)
6770-
.addUse(AUTAddrDisc)
6754+
.addImm(0)
6755+
.addUse(AUTDisc)
67716756
.constrainAllUses(TII, TRI, RBI);
67726757
MIB.buildCopy({DstReg}, Register(AArch64::X16));
67736758

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