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1 | | -//=== feature_bits.c - Update RISC-V Feature Bits Structure -*- C -*-=========// |
| 1 | +//=== cpu_model/riscv.c - Update RISC-V Feature Bits Structure -*- C -*-======// |
2 | 2 | // |
3 | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | 4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | 6 | // |
7 | 7 | //===----------------------------------------------------------------------===// |
8 | 8 |
|
| 9 | +#include "cpu_model.h" |
| 10 | + |
9 | 11 | #define RISCV_FEATURE_BITS_LENGTH 1 |
10 | 12 | struct { |
11 | 13 | unsigned length; |
@@ -204,12 +206,10 @@ static void initRISCVFeature(struct riscv_hwprobe Hwprobes[]) { |
204 | 206 | // This unsets all extension bitmask bits. |
205 | 207 |
|
206 | 208 | // Init vendor extension |
207 | | - __riscv_vendor_feature_bits.length = 0; |
208 | 209 | __riscv_vendor_feature_bits.vendorID = Hwprobes[2].value; |
209 | 210 |
|
210 | 211 | // Init standard extension |
211 | 212 | // TODO: Maybe Extension implied generate from tablegen? |
212 | | - __riscv_feature_bits.length = RISCV_FEATURE_BITS_LENGTH; |
213 | 213 |
|
214 | 214 | unsigned long long features[RISCV_FEATURE_BITS_LENGTH]; |
215 | 215 | int i; |
@@ -277,11 +277,21 @@ static void initRISCVFeature(struct riscv_hwprobe Hwprobes[]) { |
277 | 277 |
|
278 | 278 | static int FeaturesBitCached = 0; |
279 | 279 |
|
280 | | -void __init_riscv_feature_bits() { |
| 280 | +void __init_riscv_feature_bits() CONSTRUCTOR_ATTRIBUTE; |
| 281 | + |
| 282 | +// A constructor function that sets __riscv_feature_bits, and |
| 283 | +// __riscv_vendor_feature_bits to the right values. This needs to run |
| 284 | +// only once. This constructor is given the highest priority and it should |
| 285 | +// run before constructors without the priority set. However, it still runs |
| 286 | +// after ifunc initializers and needs to be called explicitly there. |
| 287 | +void CONSTRUCTOR_ATTRIBUTE __init_riscv_feature_bits() { |
281 | 288 |
|
282 | 289 | if (FeaturesBitCached) |
283 | 290 | return; |
284 | 291 |
|
| 292 | + __riscv_feature_bits.length = RISCV_FEATURE_BITS_LENGTH; |
| 293 | + __riscv_vendor_feature_bits.length = RISCV_VENDOR_FEATURE_BITS_LENGTH; |
| 294 | + |
285 | 295 | #if defined(__linux__) |
286 | 296 | struct riscv_hwprobe Hwprobes[] = { |
287 | 297 | {RISCV_HWPROBE_KEY_BASE_BEHAVIOR, 0}, |
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