@@ -3275,22 +3275,22 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
32753275 return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true);
32763276
32773277 case AArch64::AUTx16x17:
3278- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3279- &AArch64::GPR64noipRegClass);
3278+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3279+ &AArch64::GPR64noipRegClass);
32803280 return BB;
32813281 case AArch64::AUTxMxN:
3282- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3283- &AArch64::GPR64noipRegClass);
3282+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3283+ &AArch64::GPR64noipRegClass);
32843284 return BB;
32853285 case AArch64::PAC:
32863286 fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4),
32873287 &AArch64::GPR64noipRegClass);
32883288 return BB;
32893289 case AArch64::AUTPAC:
3290- fixupBlendComponents (MI, BB, MI.getOperand(1), MI.getOperand(2),
3291- &AArch64::GPR64noipRegClass);
3292- fixupBlendComponents (MI, BB, MI.getOperand(4), MI.getOperand(5),
3293- &AArch64::GPR64noipRegClass);
3290+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(1), MI.getOperand(2),
3291+ &AArch64::GPR64noipRegClass);
3292+ fixupPtrauthDiscriminator (MI, BB, MI.getOperand(4), MI.getOperand(5),
3293+ &AArch64::GPR64noipRegClass);
32943294 return BB;
32953295 }
32963296}
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