[Backup] Extend to manage backup SRAM

Signed-off-by: Frederic.Pillon <[email protected]>

Author: fpistm

cores/arduino/stm32/backup.h

@@ -48,7 +48,7 @@ extern "C" {
 
 
 /* Exported functions ------------------------------------------------------- */
-static inline void resetBackupRegister(void)
+static inline void resetBackupDomain(void)
 {
 #ifdef HAL_PWR_MODULE_ENABLED
   /*  Enable access to the RTC registers */
@@ -63,7 +63,7 @@ static inline void resetBackupRegister(void)
   __HAL_RCC_BACKUPRESET_RELEASE();
 }
 
-static inline void enableBackupRegister(void)
+static inline void enableBackupDomain(void)
 {
   /* Enable Power Clock */
 #ifdef __HAL_RCC_PWR_IS_CLK_DISABLED
@@ -76,19 +76,27 @@ static inline void enableBackupRegister(void)
   HAL_PWR_EnableBkUpAccess();
 #endif
 #ifdef __HAL_RCC_BKP_CLK_ENABLE
-  /* Enable BKP CLK enable for backup registers */
+  /* Enable BKP CLK for backup registers */
   __HAL_RCC_BKP_CLK_ENABLE();
 #endif
+#ifdef __HAL_RCC_BKPSRAM_CLK_ENABLE
+  /* Enable BKPSRAM CLK for backup SRAM */
+  __HAL_RCC_BKPSRAM_CLK_ENABLE();
+#endif
 }
 
-static inline void disableBackupRegister(void)
+static inline void disableBackupDomain(void)
 {
 #ifdef HAL_PWR_MODULE_ENABLED
   /* Forbid access to Backup domain */
   HAL_PWR_DisableBkUpAccess();
 #endif
+#ifdef __HAL_RCC_BKPSRAM_CLK_DISABLE
+  /* Disnable BKPSRAM CLK for backup SRAM */
+  __HAL_RCC_BKPSRAM_CLK_DISABLE();
+#endif
 #ifdef __HAL_RCC_BKP_CLK_DISABLE
-  /* Disable BKP CLK enable for backup registers */
+  /* Disable BKP CLK for backup registers */
   __HAL_RCC_BKP_CLK_DISABLE();
 #endif
   /* Disable Power Clock */
@@ -131,6 +139,36 @@ static inline uint32_t getBackupRegister(uint32_t index)
 #endif
 }
 
+static inline void writeBackupSRAM(uint32_t offset, uint32_t *data, uint32_t length)
+{
+#if defined(BKPSRAM_BASE)
+  uint32_t i = 0;
+  /* Write 32-Bit data to Backup SRAM */
+  for (i = 0; i < length; i++) {
+    *(__IO uint32_t *)(BKPSRAM_BASE + (offset + i) * 4) = data[i];
+  }
+#else
+  UNUSED(offset);
+  UNUSED(data);
+  UNUSED(length);
+#endif
+}
+
+static inline void readBackupSRAM(uint32_t offset, uint32_t *data, uint32_t length)
+{
+#if defined(BKPSRAM_BASE)
+  uint32_t i = 0;
+  /* Read 32-Bit data from Backup SRAM */
+  for (i = 0; i < length; i++) {
+    data[i] = *(__IO uint32_t *)(BKPSRAM_BASE + (offset + i) * 4);
+  }
+#else
+  UNUSED(offset);
+  UNUSED(data);
+  UNUSED(length);
+#endif
+}
+
 #ifdef __cplusplus
 }
 #endif

cores/arduino/stm32/clock.c

@@ -99,7 +99,7 @@ void enableClock(sourceClock_t source)
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
 
-  enableBackupRegister();
+  enableBackupDomain();
 
   switch (source) {
     case LSI_CLOCK:

cores/arduino/stm32/rtc.c

@@ -300,7 +300,7 @@ void RTC_init(hourFormat_t format, sourceClock_t source, bool reset)
   initFormat = format;
 
   if (reset) {
-    resetBackupRegister();
+    resetBackupDomain();
   }
 
   /* Init RTC clock */
@@ -338,7 +338,7 @@ void RTC_init(hourFormat_t format, sourceClock_t source, bool reset)
   HAL_NVIC_SetPriority(RTC_Alarm_IRQn, RTC_IRQ_PRIO, RTC_IRQ_SUBPRIO);
   HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
   /* Ensure backup domain is enabled */
-  enableBackupRegister();
+  enableBackupDomain();
 }
 
 /**