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fix: in case of LowPower Sleep, it is necessary to decrease CPU Frequency
Decrease CPU freq before setting LPR mode, Restore CPU freq after wakeup Signed-off-by: Alexandre Bourdiol <[email protected]>
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‎src/low_power.c‎

Lines changed: 162 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -224,13 +224,170 @@ void LowPower_EnableWakeUpPin(uint32_t pin, uint32_t mode)
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}
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}
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#if defined(PWR_CSR_REGLPF)
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/**
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* @brief For STM32L0 and STM32L1, running in LowPower Sleep requires
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* to slow down frequency to MSI range1.
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* @retval None
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*/
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void SystemClock_Decrease(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = 0;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_1;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
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Error_Handler();
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}
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}
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#elif defined(STM32L4xx) || defined(STM32L5xx) || defined(STM32WBxx) || defined(STM32WLxx)
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/**
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* @brief For STM32L4, STM32L5, STM32WB and STM32WL
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* running in LowPower Sleep requires to slow down frequency to 2MHz max.
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* @retval None
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*/
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void SystemClock_Decrease(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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#if defined(STM32L4xx) || defined(STM32WBxx)
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
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#elif defined(STM32L5xx) || defined(STM32WLxx)
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2) != HAL_OK)
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#endif
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{
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Error_Handler();
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}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU and buses clocks
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*/
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#if defined(STM32WBxx)
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4 | RCC_CLOCKTYPE_HCLK2
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| RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
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#elif defined(STM32WLxx)
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK
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| RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1
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| RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
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#elif defined(STM32L4xx)
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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#endif
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
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Error_Handler();
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}
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}
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#elif defined(STM32G0xx) || defined(STM32G4xx)
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/**
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* @brief For STM32G0 and STM32G4
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* running in LowPower Sleep requires to slow down frequency to 2MHz max.
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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/** Configure the main internal regulator output voltage
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*/
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HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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#if defined(STM32G0xx)
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RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
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#endif
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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#if defined(STM32G4xx)
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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#elif defined(STM32G0xx)
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1;
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#endif
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV8;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
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Error_Handler();
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}
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}
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#endif
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227377
/**
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* @brief Enable the sleep mode.
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* @param None
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* @retval None
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*/
232382
void LowPower_sleep(uint32_t regulator)
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{
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#if defined(PWR_CSR_REGLPF) || defined(PWR_SR2_REGLPF)
386+
// When LowPower regulator sleep mode is used, it is necessary to decrease CPU Frequency
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if (regulator == PWR_LOWPOWERREGULATOR_ON) {
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SystemClock_Decrease();
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}
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#endif
234391
/*
235392
* Suspend Tick increment to prevent wakeup by Systick interrupt.
236393
* Otherwise the Systick interrupt will wake up the device within
@@ -246,7 +403,12 @@ void LowPower_sleep(uint32_t regulator)
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if (regulator == PWR_LOWPOWERREGULATOR_ON) {
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__HAL_RCC_PWR_CLK_ENABLE();
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HAL_PWREx_DisableLowPowerRunMode();
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// Restore systemClock which has been decreased by SystemClock_Decrease()
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SystemClock_Config();
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}
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#endif
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/* Resume Tick interrupt if disabled prior to SLEEP mode entry */

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