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Merged
merged 3 commits into from
Sep 26, 2025
Merged

Changes for new sim subcommands #59

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bc635c8
Remove unnecessary dependencies
robtaylor Sep 1, 2025
20d3d91
Add [chipflow.test] sections
robtaylor Sep 24, 2025
8575cc6
Use new sim commands
robtaylor Sep 24, 2025
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3 changes: 3 additions & 0 deletions mcu_soc/chipflow.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -10,3 +10,6 @@ board = "design.steps.board:MyBoardStep"
[chipflow.silicon]
process = "ihp_sg13g2"
package = "pga144"

[chipflow.test]
event_reference = "design/tests/events_reference.json"
4 changes: 2 additions & 2 deletions minimal/chipflow.toml
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Expand Up @@ -6,10 +6,10 @@ soc = "design.design:MySoC"

[chipflow.steps]
board = "design.steps.board:MyBoardStep"
software = "design.steps.software:MySoftwareStep"

[chipflow.silicon]
process = "sky130"
package = "openframe"


[chipflow.test]
event_reference = "design/tests/events_reference.json"
14 changes: 4 additions & 10 deletions pyproject.toml
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Expand Up @@ -14,11 +14,10 @@ license = {file = "LICENSE.md"}
requires-python = ">=3.11"
dependencies = [
"amaranth[builtin-yosys]>=0.5.4,<0.6",
"chipflow-digital-ip @ git+https://github.com/ChipFlow/chipflow-digital-ip",
"minerva @ git+https://github.com/minerva-cpu/minerva",
"amaranth-soc @ git+https://github.com/amaranth-lang/amaranth-soc",
"chipflow-lib @ git+https://github.com/ChipFlow/chipflow-lib.git",
"chipflow-digital-ip @ git+https://github.com/ChipFlow/chipflow-digital-ip",
"ziglang==0.11.0",
"amaranth-soc @ git+https://github.com/amaranth-lang/amaranth-soc",
]

# Build system configuration
Expand Down Expand Up @@ -52,21 +51,16 @@ source = "scm"

[tool.pdm.scripts]
_.env_file = ".env.toolchain"
_json-compare.call = "tools.json_compare:main"
_check-project.call = "tools.check_project:main"
_run-sim.shell = "cd $PDM_RUN_CWD/build/sim && ./sim_soc"
submit.composite = ["_check-project", "chipflow silicon submit {args}"]
chipflow.shell = "cd $PDM_RUN_CWD && chipflow"
sim-run.composite = [
"_check-project",
"chipflow sim",
"chipflow software",
"_run-sim {args}"
"chipflow sim run",
]
sim-check.composite = [
"_check-project",
"sim-run {args}",
"_json-compare design/tests/events_reference.json build/sim/events.json"
"chipflow sim check",
]
board-load-software-ulx3s.composite = ["_check_project", "openFPGALoader -fb ulx3s -o 0x00100000 $PDM_RUN_CWD/build/software/software.bin"]
board-load-ulx3s.composite = ["_check_project", "openFPGALoader -b ulx3s $PDM_RUN_CWD/build/top.bit"]
Expand Down
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