[CM Conv] Enable SIMD16 Support for DPAS Convolutions #29
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Prithviraj-R
commented
Jul 15, 2024
| { | ||
| const std::uint32_t ic_chunks_per_hw_thread = 8; | ||
| const std::uint32_t exec_size = 8; | ||
| const std::uint32_t exec_size = 16; // BMG = 16, DG2 = 8 |
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@smarcink How to handle this?
| const auto gws_x = cm_params_.slice_ic * (round_up_next_multiple(output_shape_.w, cm_params_.block_w) / cm_params_.block_w); | ||
| const auto gws_y = round_up_next_multiple(output_shape_.h, cm_params_.block_h) / cm_params_.block_h; | ||
| const auto gws_z = (params_.input_shape.n / cm_params_.block_batch) * out_ch_size; | ||
| const auto execsize = 2; // BMG = 2, DG2 = 1 |
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@smarcink how to handle this?
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