Release candidate for mbed-os-5.12.4 #10610
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… behalf of Ben C.
…sabled by setting it to null
Some Nuvoton targets support DEVICE_FLASH but their corresponding COMPONENT_FLASHIAP supports are not enabled. Enable them: NUMAKER_PFM_M453 NUMAKER_PFM_M2351
the flash is shared and split between cortex-M4 that runs (mbed-os) application and the cortex-M0+ that runs the BLE firmware. The 512K allocated to the application was a conservative that can now be updated. With recent up-to-date BLE firmware flashed @ 0x080CB000, there should be 812K available to application. But there are boards out there that don't have an up-to-date firmware, so we're keeping an intermediate, safer, application size of 768K.
By default, FLASH_SIZE should be read from HW. In case this is not the case, we define it here, as the size of FLASH that is available to the application running on M4.
…ed as skip anyway
…_ECHOTEST_NONBLOCK test Reason for needing greater timeout could be this test's performance. UDPSOCKET_ECHOTEST_BURST_NONBLOCK is implementing the receiving differently and is passing with 1 second timeout.
On ARMC6 with optimization level "-Os", the two functions NVIC_SetVector/NVIC_GetVector will be translated to illegal instruction for trapping due to NVIC_FLASH_VECTOR_ADDRESS defined as direct 0. Fixed by defining NVIC_FLASH_VECTOR_ADDRESS as a symbol instead to avoid such optimization error.
SPI peripherals' asynch transaction buffers are now wrapped by SingletonPtr, which needs to take the singleton_lock Mutex when first accessed. If it was first accessed by an asynch transaction started from IRQ, that would not be possible. Add a SingletonPtr::get() call to the SPI construction process so that the peripheral's buffer is fully constructed before any SPI methods can be called, meaning asynch methods won't fail from IRQ. (Other pre-existing synchronisation issues with async remain, but this avoids a new trap in Mbed OS 5.12).
Purposes:
* Remove MbedOS-specific code from system_psoc6_{cm4,cm0plus}.c
to simplify updates to new PDL version (startup code is part of PDL).
* Unify mbed_sdk_init initialization sequence for both CPU cores.
This change is non-functional, sequence itself is not changed for any
of the PSoC 6 M4/M0 PSA/non-PSA targets.
Change the heuristic for selection of CMSE in the tools python, so that a non-TrustZone ARMv8 build can happen. Ideally we would have more direct flagging in the targets, but this refines the heuristic so the necessary behaviour can be easily achieved. * DOMAIN_NS=1 is based purely on the `-NS` suffix on the core name. * Enabling CMSE in the compiler and outputting a secure import library is now enabled when the core doesn't have an `-NS` suffix by either the target label `TFM` being present or the flag `trustzone` being set. This covers the existing ARMv8-M behaviour - TF-M builds have the TFM label, as per its documentation; M2351 secure builds have no explicit flagging, so we ensure that the M2351_NS target has the trustzone flag set, and the out-of-tree secure target inherits that.
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CI started |
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@adbridge PSA binaries haven't changed? |
Contributor
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@orenc17 It didn't look like there were any PSA related changes in this release so I haven't rebuilt them |
Test run: SUCCESSSummary: 11 of 11 test jobs passed |
0xc0170
approved these changes
May 20, 2019
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Waiting now for client tests to complete |
Contributor
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Client tests look OK |
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