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Increase ADC tolerance to 5% in FPGA-based tests #11014

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Jul 17, 2019
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Increase ADC tolerance to 5% in FPGA-based tests #11014

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4 changes: 2 additions & 2 deletions TESTS/mbed_hal_fpga_ci_test_shield/analogin/main.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -36,8 +36,8 @@ using namespace utest::v1;

#define analogin_debug_printf(...)

#define DELTA_FLOAT 0.03f // 3%
#define DELTA_U16 1965 // 3%
#define DELTA_FLOAT 0.05f // 5%
#define DELTA_U16 3277 // 5%

const PinList *form_factor = pinmap_ff_default_pins();
const PinList *restricted = pinmap_restricted_pins();
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