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Fix failure of building non-RTOS for GR-PEACH, GR-LYCHEE and VK-RZ/A1H #11816

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Merged
merged 3 commits into from
Nov 7, 2019
Merged

Fix failure of building non-RTOS for GR-PEACH, GR-LYCHEE and VK-RZ/A1H #11816

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076bbe9
Fix missing mbed_get_a9_tick_irq in non-RTOS build
d-kato Nov 6, 2019
86f648d
serial_putc waits for the transmission to complete
d-kato Nov 6, 2019
4fbb87d
Moved transmission completion wait to hal_deepsleep
d-kato Nov 7, 2019
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17 changes: 7 additions & 10 deletions targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/os_tick_ostm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -22,28 +22,25 @@
* limitations under the License.
*/

#ifdef MBED_CONF_RTOS_PRESENT

#include "os_tick.h"
#include "irq_ctrl.h"
#include "cmsis.h"
#include "mbed_drv_cfg.h"

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)

#ifdef MBED_CONF_RTOS_PRESENT
#include "os_tick.h"

// Define OS TImer interrupt priority
#ifndef OSTM_IRQ_PRIORITY
#define OSTM_IRQ_PRIORITY 0xFFU
#endif

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)


static uint32_t OSTM_Clock; // Timer tick frequency
static uint8_t OSTM_PendIRQ; // Timer interrupt pending flag


// Setup OS Tick.
int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler)
{
Expand Down Expand Up @@ -190,10 +187,10 @@ uint32_t OS_Tick_GetOverflow (void)
{
return (IRQ_GetPending(OSTM_IRQn));
}
#endif

// Get Cortex-A9 OS Timer interrupt number
IRQn_ID_t mbed_get_a9_tick_irqn(){
return OSTM_IRQn;
}
#endif

17 changes: 7 additions & 10 deletions targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/os_tick_ostm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -22,28 +22,25 @@
* limitations under the License.
*/

#ifdef MBED_CONF_RTOS_PRESENT

#include "os_tick.h"
#include "irq_ctrl.h"
#include "cmsis.h"
#include "mbed_drv_cfg.h"

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)

#ifdef MBED_CONF_RTOS_PRESENT
#include "os_tick.h"

// Define OS TImer interrupt priority
#ifndef OSTM_IRQ_PRIORITY
#define OSTM_IRQ_PRIORITY 0xFFU
#endif

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)


static uint32_t OSTM_Clock; // Timer tick frequency
static uint8_t OSTM_PendIRQ; // Timer interrupt pending flag


// Setup OS Tick.
int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler)
{
Expand Down Expand Up @@ -190,10 +187,10 @@ uint32_t OS_Tick_GetOverflow (void)
{
return (IRQ_GetPending(OSTM_IRQn));
}
#endif

// Get Cortex-A9 OS Timer interrupt number
IRQn_ID_t mbed_get_a9_tick_irqn(){
return OSTM_IRQn;
}
#endif

18 changes: 7 additions & 11 deletions targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/os_tick_ostm.c
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Original file line number Diff line number Diff line change
Expand Up @@ -22,28 +22,25 @@
* limitations under the License.
*/

#ifdef MBED_CONF_RTOS_PRESENT

#include "os_tick.h"
#include "irq_ctrl.h"
#include "cmsis.h"
#include "mbed_drv_cfg.h"

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)

#ifdef MBED_CONF_RTOS_PRESENT
#include "os_tick.h"

// Define OS TImer interrupt priority
#ifndef OSTM_IRQ_PRIORITY
#define OSTM_IRQ_PRIORITY 0xFFU
#endif

// Define OS Timer channel and interrupt number
#define OSTM (OSTM0)
#define OSTM_IRQn ((IRQn_ID_t)OSTMI0TINT_IRQn)


static uint32_t OSTM_Clock; // Timer tick frequency
static uint8_t OSTM_PendIRQ; // Timer interrupt pending flag


// Setup OS Tick.
int32_t OS_Tick_Setup (uint32_t freq, IRQHandler_t handler)
{
Expand Down Expand Up @@ -190,11 +187,10 @@ uint32_t OS_Tick_GetOverflow (void)
{
return (IRQ_GetPending(OSTM_IRQn));
}
#endif

// Get Cortex-A9 OS Timer interrupt number
IRQn_ID_t mbed_get_a9_tick_irqn(){
return OSTM_IRQn;
}

#endif

11 changes: 11 additions & 0 deletions targets/TARGET_RENESAS/TARGET_RZ_A1XX/sleep.c
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Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,17 @@ void hal_deepsleep(void) {
wk_CPGSTBCR13 = CPGSTBCR13;
#endif

/* Waits for the serial transmission to complete */
const struct st_scif *SCIF[SCIF_COUNT] = SCIF_ADDRESS_LIST;

for (int uart = 0; uart < SCIF_COUNT; uart++) {
if ((wk_CPGSTBCR4 & (1 << (7 - uart))) == 0) { // Is the power turned on?
if ((SCIF[uart]->SCSCR & 0x00A0) == 0x00A0) { // Is transmission enabled? (TE = 1, TIE = 1)
while ((SCIF[uart]->SCFSR & 0x0040) == 0); // Waits for the transmission to complete (TEND = 1)
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From my thoughts on #11401, I think it's preferable to have hal_deepsleep return immediately if it sees any serial port is busy - that way we can respond if some interrupt occurs while waiting for the port to drain. (The system will repeatedly call hal_deepsleep, so the loop occurs at a higher level).

This form might be bad for interrupt latency if the baud rate is low enough for this loop to take significant time.

Something to consider for a future improvement. Conceivably some HAL test might be upset by that "return immediately" behaviour, even though it would make sense in the real sleep code.

This is a theoretical point of view, though - I've not seen any real problem with this form. I guess if we're going into deep sleep we can assume we're not at a point where interrupt latency really matters...

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Thank you for your feedback. I'll make another pull request for this.

}
}
}

/* MTU2 (for low power ticker) */
CPGSTBCR3 |= ~(CPG_STBCR3_BIT_MSTP33);
dummy_8 = CPGSTBCR3;
Expand Down