Fix BOOT_HEADER_SIZE allocation in ARM scatter files (#13058)

[vmedcy]

Summary of changes

PSoC 64 secure BSP post-build hook (cysecuretools image signing)
expects the HEX file with start address 0x10000400 (first KB of
internal FLASH is reserved for MCUboot headers area).
In order to get the correct HEX file produced by ARM fromELF tool,
the ELF file should allocate LR_IROM1 starting from address
0x10000400, not 0x10000000. Otherwise the generated HEX file
allocates rows at addresses 0x10000000 ~ 010000400 and the
final application image is not signed correctly.

Fixes #13058.

Impact of changes

Fix TARGET_CY8CPROTO_064_SB and TARGET_CYESKIT_064B0S2_4343W signed HEX image generation with TOOLCHAIN=ARM.

Migration actions required

Documentation

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Pull request type

[X] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

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Test results

[] No Tests required for this change (E.g docs only update)
[X] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

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Reviewers

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[ciarmcom]

@vmedcy, thank you for your changes.
@maclobdell @ARMmbed/mbed-os-maintainers please review.

[adbridge]

@vmedcy I've fixed the header for you. Description text should go in the Summary section.

[0xc0170]

I dont see why events would fail in Travis, restarted the job. Will schedule CI

[0xc0170]

CI started

[mbed-ci]

Test run: SUCCESS

Summary: 6 of 6 test jobs passed
Build number : 1
Build artifacts

[maclobdell]

looks good to me.