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[LPC1549] Improve AnalogIn Performance #1564

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Merged
merged 1 commit into from
Feb 26, 2016
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[LPC1549] Improve AnalogIn Performance #1564

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8 changes: 2 additions & 6 deletions libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c
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Original file line number Diff line number Diff line change
Expand Up @@ -77,10 +77,6 @@ void analogin_init(analogin_t *obj, PinName pin) {
LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 28);
}

// select IRC as asynchronous clock, divided by 1
LPC_SYSCON->ADCASYNCCLKSEL = 0;
LPC_SYSCON->ADCASYNCCLKDIV = 1;

__IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);

// determine the system clock divider for a 500kHz ADC clock during calibration
Expand All @@ -90,8 +86,8 @@ void analogin_init(analogin_t *obj, PinName pin) {
adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
while ((adc_reg->CTRL & (1UL << 30)) != 0);

// switch to asynchronous mode
adc_reg->CTRL = (1UL << 8);
// Sampling clock: SystemClock divided by 1
adc_reg->CTRL = 0;
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NOTE: Running the ADC at 72MHz (SystemCoreClock / 1) didn't appear to affect the readings on my test board. If issues arise in the future, SystemCoreClock can simply be scaled using the CLKDIV bits in the CTRL register.

}

static inline uint32_t adc_read(analogin_t *obj) {
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