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[NUC472/M453] Support unique locally administered MAC address and other driver updates #3918

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Merged
merged 10 commits into from
Mar 22, 2017
Merged

[NUC472/M453] Support unique locally administered MAC address and other driver updates #3918

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4e4c294
[NUC472/M453] Fix incorrect use of peripheral name as peripheral base…
ccli8 Feb 15, 2017
1da33e8
[NUC472/M453] Refine pin/peripheral/pin map definitions
ccli8 Feb 15, 2017
4e96f8b
[NUC472/M453] Fix PDMA error on timeout
ccli8 Mar 7, 2017
49a2a22
[NUC472/M453] Fix pwmout power-down condition
ccli8 Mar 8, 2017
867072f
[NUC472/M453] Add dma_modbase() to get PDMA base address
ccli8 Mar 8, 2017
502e8ce
[NUC472/M453] Refine SPI PDMA code
ccli8 Mar 8, 2017
5720725
[NUC472/M453] Refine serial PDMA code
ccli8 Mar 8, 2017
fa0f928
[NUC472] Support unique locally administered MAC address
cyliangtw Mar 9, 2017
c58631b
[NUC472] Adjust locally administered MAC address
cyliangtw Mar 9, 2017
f429675
[NUC472] remove dead code in nuc472_netif.c
cyliangtw Mar 14, 2017
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39 changes: 23 additions & 16 deletions ...res/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NUVOTON/TARGET_NUC472/nuc472_netif.c
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Original file line number Diff line number Diff line change
Expand Up @@ -100,36 +100,43 @@ struct ethernetif {
// Override mbed_mac_address of mbed_interface.c to provide ethernet devices with a semi-unique MAC address
void mbed_mac_address(char *mac)
{
unsigned char my_mac_addr[6] = {0x02, 0x00, 0xac, 0x55, 0x66, 0x77}; // default mac adderss
uint32_t uID1;
// Fetch word 0
uint32_t word0 = *(uint32_t *)0x7FFFC;
uint32_t word0 = *(uint32_t *)0x7F804; // 2KB Data Flash at 0x7F800
// Fetch word 1
// we only want bottom 16 bits of word1 (MAC bits 32-47)
// and bit 9 forced to 1, bit 8 forced to 0
// Locally administered MAC, reduced conflicts
// http://en.wikipedia.org/wiki/MAC_address
uint32_t word1 = *(uint32_t *)0x7FFF8;
if( word0 == 0xFFFFFFFF ) // Not burn any mac address at the last 2 words of flash
uint32_t word1 = *(uint32_t *)0x7F800; // 2KB Data Flash at 0x7F800

if( word0 == 0xFFFFFFFF ) // Not burn any mac address at 1st 2 words of Data Flash
{
mac[0] = my_mac_addr[0];
mac[1] = my_mac_addr[1];
mac[2] = my_mac_addr[2];
mac[3] = my_mac_addr[3];
mac[4] = my_mac_addr[4];
mac[5] = my_mac_addr[5];
return;
// with a semi-unique MAC address from the UUID
/* Enable FMC ISP function */
SYS_UnlockReg();
FMC_Open();
// = FMC_ReadUID(0);
uID1 = FMC_ReadUID(1);
word1 = (uID1 & 0x003FFFFF) | ((uID1 & 0x030000) << 6) >> 8;
word0 = ((FMC_ReadUID(0) >> 4) << 20) | ((uID1 & 0xFF)<<12) | (FMC_ReadUID(2) & 0xFFF);
/* Disable FMC ISP function */
FMC_Close();
/* Lock protected registers */
SYS_LockReg();
}

word1 |= 0x00000200;
word1 &= 0x0000FEFF;
mac[0] = (word1 & 0x000000ff);
mac[1] = (word1 & 0x0000ff00) >> 8;

mac[0] = (word1 & 0x0000ff00) >> 8;
mac[1] = (word1 & 0x000000ff);
mac[2] = (word0 & 0xff000000) >> 24;
mac[3] = (word0 & 0x00ff0000) >> 16;
mac[4] = (word0 & 0x0000ff00) >> 8;
mac[5] = (word0 & 0x000000ff);


LWIP_DEBUGF(LWIP_DBG_LEVEL_WARNING|LWIP_DBG_ON, ("mac address %02x-%02x-%02x-%02x-%02x-%02x \r\n", mac[0], mac[1],mac[2],mac[3],mac[4],mac[5]));
}

/**
Expand Down Expand Up @@ -350,7 +357,7 @@ ethernetif_loopback_input(struct pbuf *p) // TODO: make sure packet no
{
/* pass all packets to ethernet_input, which decides what packets it supports */
if (netif->input(p, netif) != ERR_OK) {
LWIP_DEBUGF(NETIF_DEBUG, ("k64f_enetif_input: input error\n"));
LWIP_DEBUGF(NETIF_DEBUG, ("netif_input: input error\n"));
/* Free buffer */
pbuf_free(p);
}
Expand Down
116 changes: 61 additions & 55 deletions targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PeripheralNames.h
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Original file line number Diff line number Diff line change
Expand Up @@ -23,95 +23,101 @@
extern "C" {
#endif

// NOTE: TIMER0_BASE=(APBPERIPH_BASE + 0x10000)
// TIMER1_BASE=(APBPERIPH_BASE + 0x10020)
#define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX))
#define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0)
#define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F)
// NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
// which encodes module base address and module index/subindex.
#define NU_MODSUBINDEX_Pos 0
#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
#define NU_MODINDEX_Pos 20
#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)

#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)

#if 0
typedef enum {
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0),
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0),
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0),
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0),
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0),
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0)
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0),
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0),
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0),
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0),
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0)
} GPIOName;
#endif

typedef enum {
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0),
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 1),
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 2),
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 3),
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 4),
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 5),
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 6),
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 7),
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 8),
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 9),
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 10),
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 11),
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 12),
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 13),
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 14),
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 15)
ADC_0_0 = (int) NU_MODNAME(EADC0_BASE, 0, 0),
ADC_0_1 = (int) NU_MODNAME(EADC0_BASE, 0, 1),
ADC_0_2 = (int) NU_MODNAME(EADC0_BASE, 0, 2),
ADC_0_3 = (int) NU_MODNAME(EADC0_BASE, 0, 3),
ADC_0_4 = (int) NU_MODNAME(EADC0_BASE, 0, 4),
ADC_0_5 = (int) NU_MODNAME(EADC0_BASE, 0, 5),
ADC_0_6 = (int) NU_MODNAME(EADC0_BASE, 0, 6),
ADC_0_7 = (int) NU_MODNAME(EADC0_BASE, 0, 7),
ADC_0_8 = (int) NU_MODNAME(EADC0_BASE, 0, 8),
ADC_0_9 = (int) NU_MODNAME(EADC0_BASE, 0, 9),
ADC_0_10 = (int) NU_MODNAME(EADC0_BASE, 0, 10),
ADC_0_11 = (int) NU_MODNAME(EADC0_BASE, 0, 11),
ADC_0_12 = (int) NU_MODNAME(EADC0_BASE, 0, 12),
ADC_0_13 = (int) NU_MODNAME(EADC0_BASE, 0, 13),
ADC_0_14 = (int) NU_MODNAME(EADC0_BASE, 0, 14),
ADC_0_15 = (int) NU_MODNAME(EADC0_BASE, 0, 15)
} ADCName;

typedef enum {
UART_0 = (int) NU_MODNAME(UART0_BASE, 0),
UART_1 = (int) NU_MODNAME(UART1_BASE, 0),
UART_2 = (int) NU_MODNAME(UART2_BASE, 0),
UART_3 = (int) NU_MODNAME(UART3_BASE, 0),
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
// FIXME: board-specific
STDIO_UART = UART_3
} UARTName;

typedef enum {
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0),
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0),
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0)
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0)
} SPIName;

typedef enum {
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0),
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0)
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0)
} I2CName;

typedef enum {
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0),
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1),
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2),
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3),
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4),
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5),
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0),
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1),
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2),
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3),
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4),
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5),

PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0),
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1),
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2),
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3),
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4),
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5)
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0),
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1),
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2),
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3),
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4),
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5)
} PWMName;

typedef enum {
TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0),
TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 0),
TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 0),
TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 0),
TIMER_0 = (int) NU_MODNAME(TMR01_BASE, 0, 0),
TIMER_1 = (int) NU_MODNAME(TMR01_BASE + 0x20, 1, 0),
TIMER_2 = (int) NU_MODNAME(TMR23_BASE, 2, 0),
TIMER_3 = (int) NU_MODNAME(TMR23_BASE + 0x20, 3, 0),
} TIMERName;

typedef enum {
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0)
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
} RTCName;

typedef enum {
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
} DMAName;

typedef enum {
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0)
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0)
} CANName;

#ifdef __cplusplus
Expand Down
33 changes: 26 additions & 7 deletions targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/PinNames.h
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Original file line number Diff line number Diff line change
Expand Up @@ -22,13 +22,32 @@
extern "C" {
#endif

#define NU_PORT_SHIFT 12
#define NU_PINNAME_TO_PORT(name) ((unsigned int)(name) >> NU_PORT_SHIFT)
#define NU_PINNAME_TO_PIN(name) ((unsigned int)(name) & ~(0xFFFFFFFF << NU_PORT_SHIFT))
#define NU_PORT_N_PIN_TO_PINNAME(port, pin) ((((unsigned int) (port)) << (NU_PORT_SHIFT)) | ((unsigned int) (pin)))
#define NU_PORT_BASE(port) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
#define NU_MFP_POS(pin) ((pin % 8) * 4)
#define NU_MFP_MSK(pin) (0xful << NU_MFP_POS(pin))
#define NU_PININDEX_Pos 0
#define NU_PININDEX_Msk (0xFFul << NU_PININDEX_Pos)
#define NU_PINPORT_Pos 8
#define NU_PINPORT_Msk (0xFul << NU_PINPORT_Pos)
#define NU_PIN_MODINDEX_Pos 12
#define NU_PIN_MODINDEX_Msk (0xFul << NU_PIN_MODINDEX_Pos)
#define NU_PIN_BIND_Pos 16
#define NU_PIN_BIND_Msk (0x1ul << NU_PIN_BIND_Pos)

#define NU_PININDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PININDEX_Msk) >> NU_PININDEX_Pos)
#define NU_PINPORT(PINNAME) (((unsigned int)(PINNAME) & NU_PINPORT_Msk) >> NU_PINPORT_Pos)
#define NU_PIN_BIND(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_BIND_Msk) >> NU_PIN_BIND_Pos)
#define NU_PIN_MODINDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_MODINDEX_Msk) >> NU_PIN_MODINDEX_Pos)
#define NU_PINNAME(PORT, PIN) ((((unsigned int) (PORT)) << (NU_PINPORT_Pos)) | (((unsigned int) (PIN)) << NU_PININDEX_Pos))
#define NU_PINNAME_BIND(PINNAME, modname) NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname)
#define NU_PINNAME_BIND_(PORT, PIN, modname) ((((unsigned int)(PORT)) << NU_PINPORT_Pos) | (((unsigned int)(PIN)) << NU_PININDEX_Pos) | (NU_MODINDEX(modname) << NU_PIN_MODINDEX_Pos) | NU_PIN_BIND_Msk)

#define NU_PORT_BASE(port) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
#define NU_MFP_POS(pin) ((pin % 8) * 4)
#define NU_MFP_MSK(pin) (0xful << NU_MFP_POS(pin))

// LEGACY
#define NU_PINNAME_TO_PIN(PINNAME) NU_PININDEX(PINNAME)
#define NU_PINNAME_TO_PORT(PINNAME) NU_PINPORT(PINNAME)
#define NU_PINNAME_TO_MODSUBINDEX(PINNAME) NU_PIN_MODINDEX(PINNAME)
#define NU_PORT_N_PIN_TO_PINNAME(PORT, PIN) NU_PINNAME((PORT), (PIN))

typedef enum {
PIN_INPUT,
Expand Down
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