[https://nvbugs/5394392][fix] Enlarge scheduler capacity under disagg bs == 1 #6975
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… bs == 1 (NVIDIA#6537) Signed-off-by: Yifei Zhang <[email protected]>
📝 WalkthroughWalkthroughAdds guards to skip sequence-slot assignment for DISAGG_GENERATION_INIT requests in both C++ and Python paths, adjusts scheduler capacity for an attention-DP edge case (bs=1), moves SEQ_SLOT_MANAGER.prepare_resources from disagg-init to transmission-complete, and adds a generation-only BS=1 disaggregated test config, test, and test-list entry. Changes
Sequence Diagram(s)sequenceDiagram
participant Client
participant PyExecutor
participant SeqSlotManager
participant AssignReqSeqSlots
Client->>PyExecutor: Submit request (DISAGG_GENERATION_INIT)
PyExecutor->>SeqSlotManager: prepare_resources(disagg_init)
SeqSlotManager-->>PyExecutor: Skip DISAGG_GENERATION_INIT (no slot)
Note over PyExecutor: Cache transmission completes later
PyExecutor->>SeqSlotManager: prepare_resources(transmission_complete)
SeqSlotManager->>AssignReqSeqSlots: include requests for slot assignment
AssignReqSeqSlots-->>SeqSlotManager: allocate/assign sequence slot
SeqSlotManager-->>PyExecutor: request now has slot and scheduling info
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~25 minutes Possibly related PRs
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Actionable comments posted: 3
🧹 Nitpick comments (5)
tensorrt_llm/_torch/pyexecutor/_util.py (1)
527-532: Bump scheduler capacity for bs==1 attention-DP edge case; add a debug log for observabilityThe capacity bump logic is correct and low-risk. Consider logging when the adjustment happens to aid diagnosis in field.
Apply this diff to add a debug log:
scheduler_capacity = max_num_sequences - if scheduler_capacity == 1 and mapping.enable_attention_dp and kv_cache_manager: - scheduler_capacity += 1 + if scheduler_capacity == 1 and mapping.enable_attention_dp and kv_cache_manager: + scheduler_capacity += 1 + logger.debug( + "Adjusting scheduler capacity from %d to %d due to attention_dp with KV cache manager (bs==1)", + max_num_sequences, scheduler_capacity)Also applies to: 534-534
tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml (3)
17-18: Unify boolean literals for YAML 1.2 style consistencyBooleans are mixed (
True/Falsevstrue/false). While PyYAML accepts both, prefer lowercase for consistency and to avoid surprises with stricter parsers.Apply:
- enable_partial_reuse: False - disable_overlap_scheduler: True + enable_partial_reuse: false + disable_overlap_scheduler: true @@ - enable_partial_reuse: False + enable_partial_reuse: falseAlso applies to: 33-33
23-37: Consider explicitly mirroring overlap-scheduler setting on generation serversYou set
disable_overlap_scheduler: truefor context servers but not for generation servers. If the intent is to keep behavior aligned (especially with attention DP enabled), explicitly setting it in both places prevents subtle divergence during debugging and triage. If the difference is intentional, ignore this.Suggested addition:
generation_servers: num_instances: 1 tensor_parallel_size: 2 pipeline_parallel_size: 1 enable_attention_dp: true max_batch_size: 1 max_num_tokens: 4096 max_seq_len: 4096 + disable_overlap_scheduler: true kv_cache_config: free_gpu_memory_fraction: 0.2 enable_partial_reuse: false
15-16: Sanity-check KV cache headroom vs max_seq_lenIn tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml you’ve set
- Line 16:
kv_cache_config.free_gpu_memory_fraction: 0.2- Line 32:
kv_cache_config.free_gpu_memory_fraction: 0.2together with
max_seq_len: 4096andenable_attention_dp: true. This headroom can be tight under allocator fragmentation and per‐rank memory pressure, leading to intermittent OOMs in CI. Consider bumpingfree_gpu_memory_fractionto 0.25–0.3 in both spots if you observe flakiness.tests/integration/test_lists/test-db/l0_dgx_h100.yml (1)
36-36: Optional: add an explicit timeout guardGiven this test specifically targets a former “nonstop” edge case, consider adding a TIMEOUT to make CI failures more actionable if regressions reintroduce hangs.
For example:
- - disaggregated/test_disaggregated.py::test_disaggregated_genbs1[TinyLlama-1.1B-Chat-v1.0] + - disaggregated/test_disaggregated.py::test_disaggregated_genbs1[TinyLlama-1.1B-Chat-v1.0] TIMEOUT (120)
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📒 Files selected for processing (7)
cpp/tensorrt_llm/batch_manager/assignReqSeqSlots.cpp(1 hunks)tensorrt_llm/_torch/pyexecutor/_util.py(1 hunks)tensorrt_llm/_torch/pyexecutor/py_executor.py(1 hunks)tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py(1 hunks)tests/integration/defs/disaggregated/test_configs/disagg_config_gen_only_bs1.yaml(1 hunks)tests/integration/defs/disaggregated/test_disaggregated.py(2 hunks)tests/integration/test_lists/test-db/l0_dgx_h100.yml(1 hunks)
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tensorrt_llm/_torch/pyexecutor/seq_slot_manager.pytensorrt_llm/_torch/pyexecutor/py_executor.pytensorrt_llm/_torch/pyexecutor/_util.pytests/integration/defs/disaggregated/test_disaggregated.py
🧬 Code Graph Analysis (3)
tensorrt_llm/_torch/pyexecutor/py_executor.py (5)
tensorrt_llm/_torch/pyexecutor/resource_manager.py (7)
ResourceManagerType(45-50)prepare_resources(70-71)prepare_resources(358-386)prepare_resources(986-994)prepare_resources(1087-1089)prepare_resources(1148-1151)prepare_resources(1250-1266)tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (1)
prepare_resources(17-29)tensorrt_llm/_torch/speculative/mtp.py (1)
prepare_resources(63-71)tensorrt_llm/_torch/speculative/ngram.py (1)
prepare_resources(68-69)tensorrt_llm/_torch/speculative/eagle3.py (1)
prepare_resources(48-57)
tensorrt_llm/_torch/pyexecutor/_util.py (5)
tensorrt_llm/_torch/models/checkpoints/base_weight_mapper.py (1)
mapping(152-153)cpp/include/tensorrt_llm/batch_manager/runtimeBuffers.h (1)
kv_cache_manager(48-51)cpp/tensorrt_llm/batch_manager/trtGptModel.h (1)
kv_cache_manager(43-46)cpp/include/tensorrt_llm/batch_manager/capacityScheduler.h (1)
kv_cache_manager(28-31)tensorrt_llm/_torch/pyexecutor/scheduler.py (1)
BindCapacityScheduler(70-97)
tests/integration/defs/disaggregated/test_disaggregated.py (1)
tests/integration/defs/conftest.py (4)
disaggregated_test_root(2339-2344)disaggregated_example_root(270-275)llm_venv(707-723)llama_model_root(964-1039)
🪛 Ruff (0.12.2)
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py
20-20: Undefined name logger
(F821)
🔇 Additional comments (4)
cpp/tensorrt_llm/batch_manager/assignReqSeqSlots.cpp (1)
33-37: Correctly skipping slot assignment for DISAGG_GENERATION_INITGuarding DISAGG_GENERATION_INIT requests from slot assignment here aligns with the new flow (slots allocated at transmission-complete). This prevents the deadlock when bs==1. Looks good.
tests/integration/defs/disaggregated/test_disaggregated.py (1)
50-52: Add gen_only_bs1 config mappingThe new entry for the bs=1 gen-only disaggregated config looks good and matches the test below.
tests/integration/test_lists/test-db/l0_dgx_h100.yml (2)
36-36: LGTM: Added gen-only bs=1 disaggregated testThe placement and parameterization look correct alongside neighboring disaggregated tests.
36-36: All tests and config wiring verified
- The
test_disaggregated_genbs1function is defined in tests/integration/defs/disaggregated/test_disaggregated.py (line 395).- The config file disagg_config_gen_only_bs1.yaml exists under tests/integration/defs/disaggregated/test_configs/.
- That config is referenced in tests/integration/defs/disaggregated/test_disaggregated.py (line 51).
No further changes needed.
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… bs == 1 (#6975) Signed-off-by: Yifei Zhang <[email protected]>
… bs == 1 (NVIDIA#6975) Signed-off-by: Yifei Zhang <[email protected]> Signed-off-by: Wangshanshan <[email protected]>
… bs == 1 (NVIDIA#6975) Signed-off-by: Yifei Zhang <[email protected]> Signed-off-by: Wangshanshan <[email protected]>
… bs == 1 (NVIDIA#6975) Signed-off-by: Yifei Zhang <[email protected]> Signed-off-by: Wangshanshan <[email protected]>
… bs == 1 (NVIDIA#6975) Signed-off-by: Yifei Zhang <[email protected]> Signed-off-by: Wangshanshan <[email protected]>
… bs == 1 (NVIDIA#6975) Signed-off-by: Yifei Zhang <[email protected]> Signed-off-by: Wangshanshan <[email protected]>
4 participants
Description
Under disagg, if generation server runs with bs == 1, the dummy
GENERATION_IN_PROGRESSrequest for attention dp will preventDISAGG_GENERATION_INITfrom being scheduled, thus letting generation server running in an endless cycle. This PR enlarges scheduler capacity and related resources to be with at least capacity == 2.Besides, originally py_executor logic assign new
SEQ_SLOTresource onDISAGG_GEN_INITstate. This PR delays the preparation toDISAGG_TRANS_COMPLETEstate.Test Coverage
Added
disaggregated/test_disaggregated.py::test_disaggregated_genbs1[TinyLlama-1.1B-Chat-v1.0]to cover generation server bs==1 case.GitHub Bot Help
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Summary by CodeRabbit
Bug Fixes
Tests