[TRTLLM-7731][feat] Avoid over-allocation of KV cache for transmission in disagg with CP #8145
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📝 WalkthroughWalkthroughAdds CP-aware block distribution and transmission behavior. Extends getBlockRangeForSending with recvSideHasCP. Centralizes CP block allocation in executor::kv_cache and exposes env-controlled round-robin behavior. Updates MLA split kernel interfaces and host dispatch to pass CP distribution metadata. Introduces a new env getter. Refactors and expands unit tests for CP-aware flows. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
participant Sender
participant CacheFormatter as CacheFormatter.getBlockRangeForSending
participant CacheManager
participant Receiver
Sender->>CacheFormatter: getBlockRangeForSending(cacheManager, llmRequest, lastBlockKey, indexFromEnd, recvSideHasCP)
CacheFormatter->>CacheManager: query block reuse/availability
alt recvSideHasCP is true
Note over CacheFormatter: CP on recv side implies full block transfer
CacheFormatter-->>Sender: BlockRange(full)
else recvSideHasCP is false
CacheFormatter-->>Sender: BlockRange(full or reused)
end
Sender->>Receiver: transmit blocks per BlockRange
sequenceDiagram
autonumber
participant Host as splitKVCache (host)
participant Env as envUtils
participant Exec as executor::kv_cache
participant Kernel as splitKVCacheForMLA (GPU)
Host->>Env: getEnvUseRoundRobinBlockDistForCP()
Env-->>Host: isCPRoundRobin
loop for each CP rank
Host->>Exec: getBlockNumAccountingForCP(cpRank, cpSize, numBlocks)
Exec-->>Host: blocksForRank
end
Note over Host: Build prefixBlockNum vector and copy to device
Host->>Kernel: launch(..., isCPRoundRobin, prefixBlockNumDevPtr)
alt Round-robin
Kernel->>Kernel: map local->global via round-robin
else Non round-robin
Kernel->>Kernel: map via prefix counts and domain lookup
end
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Possibly related PRs
Suggested reviewers
Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
✨ Finishing touches
🧪 Generate unit tests (beta)
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⚠️ Outside diff range comments (1)
cpp/tensorrt_llm/batch_manager/cacheFormatter.h (1)
45-46: Fix declaration/implementation mismatch.The declaration on line 55 defines a 3-parameter overload, but the implementation in cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (lines 44-58) is a 5-parameter function that extends the existing 4-parameter version on lines 45-46. The correct change is to update lines 45-46 to include the new parameter with a default value, not add a separate 3-parameter overload.
Apply this diff to fix the declarations:
BlockRange getBlockRangeForSending(BaseKVCacheManager* cacheManager, LlmRequest const& llmRequest, - BlockKey const& lastBlockKey, SizeType32 indexFromEnd); + BlockKey const& lastBlockKey, SizeType32 indexFromEnd, bool recvSideHasCP=false); using DataContext = tensorrt_llm::executor::kv_cache::DataContext; using Connection = tensorrt_llm::executor::kv_cache::Connection; using SizeType32 = tensorrt_llm::runtime::SizeType32; using BaseKVCacheManager = kv_cache_manager::BaseKVCacheManager; using CacheTransBufferManager = kv_cache_manager::CacheTransBufferManager; using BlockRange = kv_cache_manager::BlockRange; -BlockRange getBlockRangeForSending(BaseKVCacheManager* cacheManager, LlmRequest const& llmRequest, bool recvSideHasCP=false);Also applies to: 55-55
🧹 Nitpick comments (2)
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h (1)
79-79: Add documentation forgetGlobalBlockIdAccountingForCP.The function declaration lacks Doxygen documentation. Consider adding documentation similar to
getBlockNumAccountingForCPabove.Example documentation:
+/** + * @brief Calculate the global block ID from a local block index. + * + * This function maps a local block index on a CP rank to its corresponding global block ID, + * accounting for CP distribution strategy (round-robin vs. contiguous). + * + * @param localBlockIdx The local block index on the current CP rank. + * @param cpSize The total number of CP ranks/processes in the parallel group. + * @param cpRank The rank (index) of the current CP process. Must be in range [0, cpSize). + * @param numTotalBlocks The total number of blocks distributed across all CP ranks. + * + * @return The global block ID corresponding to the local block index. + */ int getGlobalBlockIdAccountingForCP(int localBlockIdx, int cpSize, int cpRank, int numTotalBlocks);cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (1)
646-656: Minor: Remove trailing whitespace.Line 684 has trailing whitespace after the comment.
int const headIdInDomainTP = headId; - +As per coding guidelines, maintain clean formatting.
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📒 Files selected for processing (9)
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp(1 hunks)cpp/tensorrt_llm/batch_manager/cacheFormatter.h(1 hunks)cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp(3 hunks)cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.h(0 hunks)cpp/tensorrt_llm/common/envUtils.cpp(1 hunks)cpp/tensorrt_llm/common/envUtils.h(1 hunks)cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu(13 hunks)cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h(1 hunks)cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp(18 hunks)
💤 Files with no reviewable changes (1)
- cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.h
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🧠 Learnings (7)
📚 Learning: 2025-08-21T09:41:49.347Z
Learnt from: eopXD
PR: NVIDIA/TensorRT-LLM#6768
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:2010-2045
Timestamp: 2025-08-21T09:41:49.347Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, updateSequenceCacheBlockOffsets is specifically for updating bookkeeping when blocks are added during the context phase, not for refreshing offsets after detach operations. During detach operations, GenerationRequest::removeFrontBlock handles the necessary cache block bookkeeping internally.
Applied to files:
cpp/tensorrt_llm/batch_manager/cacheFormatter.hcpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cppcpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cppcpp/tensorrt_llm/batch_manager/cacheFormatter.cpp
📚 Learning: 2025-08-14T21:04:50.248Z
Learnt from: thorjohnsen
PR: NVIDIA/TensorRT-LLM#6910
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-14T21:04:50.248Z
Learning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.
Applied to files:
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cppcpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
📚 Learning: 2025-08-20T06:48:45.368Z
Learnt from: eopXD
PR: NVIDIA/TensorRT-LLM#6768
File: cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h:0-0
Timestamp: 2025-08-20T06:48:45.368Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, updateSequenceCacheBlockOffsets is only called when adding a sequence, not during detach operations. During detach, the cache block bookkeeping is handled by GenerationRequest::removeFrontBlock.
Applied to files:
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cppcpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu
📚 Learning: 2025-08-15T06:46:54.897Z
Learnt from: eopXD
PR: NVIDIA/TensorRT-LLM#6767
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-15T06:46:54.897Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp addToken function, newly allocated blocks are unshared by design. The beam search path in addToken (when sequence.getNumTokens() > windowSize) is currently broken/non-functional with SWA, so the block allocation doesn't follow a shared-then-unshared pattern.
Applied to files:
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cppcpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/config.cu), std::ostringstream is used but <sstream> doesn't need to be explicitly included because it's provided transitively through other headers like tensorrt_llm/common/cudaUtils.h or config.h. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu
📚 Learning: 2025-09-23T15:13:48.819Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Applied to files:
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu
🧬 Code graph analysis (6)
cpp/tensorrt_llm/batch_manager/cacheFormatter.h (1)
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (2)
getBlockRangeForSending(44-58)getBlockRangeForSending(44-45)
cpp/tensorrt_llm/common/envUtils.h (1)
cpp/tensorrt_llm/common/envUtils.cpp (2)
getEnvUseRoundRobinBlockDistForCP(281-285)getEnvUseRoundRobinBlockDistForCP(281-281)
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp (2)
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (2)
getBlockRangeForSending(44-58)getBlockRangeForSending(44-45)cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (2)
getBlockNumAccountingForCP(49-65)getBlockNumAccountingForCP(49-49)
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp (3)
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (4)
getBlockNumAccountingForCP(49-65)getBlockNumAccountingForCP(49-49)getGlobalBlockIdAccountingForCP(67-79)getGlobalBlockIdAccountingForCP(67-67)cpp/tensorrt_llm/common/envUtils.cpp (2)
getEnvUseRoundRobinBlockDistForCP(281-285)getEnvUseRoundRobinBlockDistForCP(281-281)cpp/include/tensorrt_llm/batch_manager/kvCacheUtils.h (1)
fromAllBlockIds(34-41)
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.h (1)
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (4)
getBlockNumAccountingForCP(49-65)getBlockNumAccountingForCP(49-49)getGlobalBlockIdAccountingForCP(67-79)getGlobalBlockIdAccountingForCP(67-67)
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (1)
cpp/tensorrt_llm/common/envUtils.cpp (2)
getEnvUseRoundRobinBlockDistForCP(281-285)getEnvUseRoundRobinBlockDistForCP(281-281)
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🔇 Additional comments (11)
cpp/tensorrt_llm/common/envUtils.h (1)
63-64: LGTM!The new environment variable getter follows the established pattern and naming conventions consistently.
cpp/tensorrt_llm/common/envUtils.cpp (1)
281-285: LGTM!The implementation correctly follows the established pattern for environment variable getters, using static const for caching and the appropriate helper function.
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp (3)
118-119: LGTM!The CP detection logic and parameter passing to
getBlockRangeForSendingcorrectly implements the intended behavior for CP-aware cache transmission.
174-174: LGTM!The sanity check ensures
blockSizePerLayeris valid before use, preventing division-by-zero or invalid memory calculations.
184-184: LGTM!Using the centralized
executor::kv_cache::getBlockNumAccountingForCPaligns with the PR's goal to centralize CP accounting logic and remove local implementations.cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (1)
44-58: LGTM!The implementation correctly adds CP-aware logic with a clear explanatory comment. The condition properly returns all blocks when the receiver has CP, avoiding issues with distributed sequence lengths.
cpp/tensorrt_llm/executor/cache_transmission/cacheSplitConcat.cu (5)
49-65: LGTM!The block distribution logic correctly implements even distribution with overflow blocks assigned to lower-indexed ranks. The early return for
cpSize == 1optimizes the common case.
67-79: LGTM!The global block ID calculation correctly handles both round-robin and contiguous distribution modes based on the environment variable. The contiguous calculation properly accounts for overflow blocks on previous ranks.
1157-1163: LGTM!The
prefixBlockNumarray is correctly sized asdomainCPSize + 1and populated with a proper prefix sum usinggetBlockNumAccountingForCP. This matches the device function's access pattern.Note: This confirms the bounds in the device function
getBlockIdInDomainCPandRankInDomainCPare safe.
1239-1239: LGTM!The environment variable is correctly read once and propagated to all kernel launch sites. The kernel signature extensions properly pass both
isCPRoundRobinandprefixBlockNumDevPtrfor CP-aware distribution.Also applies to: 1254-1257, 1279-1282, 1307-1310, 1340-1343, 1369-1372
604-625: Bounds verified – remove TODO
prefixBlockNumis allocated withtargetRankInfo.mDomainCPSize + 1, soprefixBlockNumDevPtr[cpRank+1]is always in bounds. Delete the “Verify that these bounds are safe” TODO on line 611.
|
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||
| #pragma unroll 1 | ||
| // TODO: Verify that these bounds are safe to use. | ||
| for (int cpRank = threadIdx.x; cpRank < domainCPSize; cpRank += blockDim.x) |
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@chuangz0, this function closely follows getLayerIdInDomainPPandRankInDomainPP. Can you please verify the bounds for CP rank make sense?
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Signed-off-by: Balaram Buddharaju <[email protected]>
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Description
Currently on main, we require gen ranks with CP to allocate KV cache for entire sequence length (though they only need KV cache for the portion of sequence length they'll hold) to get cache transmission right. This MR removes the limitation.
Also, previously, cache transmission is such that blocks are transmitted to genCP ranks in a round-robin fashion. This MR updates the transmission to be contiguous.
For example, let's say ctxTpSize=1 and genCpSize=2 and there are 5 blocks to be transmitted with IDs 0, 1, 2, 3, 4 for a given sequence.
We keep around the round-robin distribution as an opt-in functionality by setting an env variable.
Known limitations:
getBlockRangeForSending. This is ok for now.Test Coverage
$ TRTLLM_USE_UCX_KVCACHE=1 TLLM_LOG_LEVEL=INFO mpirun -n 8 ./tests/unit_tests/multi_gpu/cacheTransceiverTest --gtest_filter="AsymmetricCaseTest0WithCPForMLA/AsymmetricalCacheTest.TestCase/*"
$ TRTLLM_USE_UCX_KVCACHE=1 TLLM_LOG_LEVEL=INFO mpirun -n 8 ./tests/unit_tests/multi_gpu/cacheTransceiverTest --gtest_filter="AsymmetricCaseTest1WithCPForMLA/AsymmetricalCacheTest.TestCase/*"
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/bot [-h|--help]to print this help message.See details below for each supported subcommand.
run [--reuse-test (optional)pipeline-id --disable-fail-fast --skip-test --stage-list "A10-PyTorch-1, xxx" --gpu-type "A30, H100_PCIe" --test-backend "pytorch, cpp" --add-multi-gpu-test --only-multi-gpu-test --disable-multi-gpu-test --post-merge --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx" --detailed-log --debug(experimental)]Launch build/test pipelines. All previously running jobs will be killed.
--reuse-test (optional)pipeline-id(OPTIONAL) : Allow the new pipeline to reuse build artifacts and skip successful test stages from a specified pipeline or the last pipeline if no pipeline-id is indicated. If the Git commit ID has changed, this option will be always ignored. The DEFAULT behavior of the bot is to reuse build artifacts and successful test results from the last pipeline.--disable-reuse-test(OPTIONAL) : Explicitly prevent the pipeline from reusing build artifacts and skipping successful test stages from a previous pipeline. Ensure that all builds and tests are run regardless of previous successes.--disable-fail-fast(OPTIONAL) : Disable fail fast on build/tests/infra failures.--skip-test(OPTIONAL) : Skip all test stages, but still run build stages, package stages and sanity check stages. Note: Does NOT update GitHub check status.--stage-list "A10-PyTorch-1, xxx"(OPTIONAL) : Only run the specified test stages. Examples: "A10-PyTorch-1, xxx". Note: Does NOT update GitHub check status.--gpu-type "A30, H100_PCIe"(OPTIONAL) : Only run the test stages on the specified GPU types. Examples: "A30, H100_PCIe". Note: Does NOT update GitHub check status.--test-backend "pytorch, cpp"(OPTIONAL) : Skip test stages which don't match the specified backends. Only support [pytorch, cpp, tensorrt, triton]. Examples: "pytorch, cpp" (does not run test stages with tensorrt or triton backend). Note: Does NOT update GitHub pipeline status.--only-multi-gpu-test(OPTIONAL) : Only run the multi-GPU tests. Note: Does NOT update GitHub check status.--disable-multi-gpu-test(OPTIONAL) : Disable the multi-GPU tests. Note: Does NOT update GitHub check status.--add-multi-gpu-test(OPTIONAL) : Force run the multi-GPU tests in addition to running L0 pre-merge pipeline.--post-merge(OPTIONAL) : Run the L0 post-merge pipeline instead of the ordinary L0 pre-merge pipeline.--extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx"(OPTIONAL) : Run the ordinary L0 pre-merge pipeline and specified test stages. Examples: --extra-stage "H100_PCIe-TensorRT-Post-Merge-1, xxx".--detailed-log(OPTIONAL) : Enable flushing out all logs to the Jenkins console. This will significantly increase the log volume and may slow down the job.--debug(OPTIONAL) : Experimental feature. Enable access to the CI container for debugging purpose. Note: Specify exactly one stage in thestage-listparameter to access the appropriate container environment. Note: Does NOT update GitHub check status.For guidance on mapping tests to stage names, see
docs/source/reference/ci-overview.mdand the
scripts/test_to_stage_mapping.pyhelper.kill
killKill all running builds associated with pull request.
skip
skip --comment COMMENTSkip testing for latest commit on pull request.
--comment "Reason for skipping build/test"is required. IMPORTANT NOTE: This is dangerous since lack of user care and validation can cause top of tree to break.reuse-pipeline
reuse-pipelineReuse a previous pipeline to validate current commit. This action will also kill all currently running builds associated with the pull request. IMPORTANT NOTE: This is dangerous since lack of user care and validation can cause top of tree to break.