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Issue with soundness of HLIL control flow structuring #5201

@plafosse

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@plafosse

HLIL can produce unsound control flow structuring in some conditions.

Consider this MLIL code:

orig_state_exec.zip

In MLIL everything looks correct:
image

Consider the case when 'i = 0the path meansiis assigned to5and then ultimately goes to instruction21`

Now in HLIL:
image
The control flow is a series of if statements rather than if-else statements. In the case of i == 0 it meets the first condition and sets i = 5 and then can also satisfy the second condition too incorrectly setting var_20 = 1

Special Thanks to: Zao Yang and Stefan Nagy for their research in Decompiler Fuzzing for reporting this issue.

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Component: CoreIssue needs changes to the coreCore: HLILIssue involves High Level ILEffort: HighIssues require > 1 month of workImpact: HighIssue adds or blocks important functionality

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