Develop/g xp merge

arch/arm/boot/dts/sc594-som-ezkit.dts

@@ -156,6 +156,18 @@
 	};
 };
 
+&spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi1_default>;
+	status = "okay";
+
+	spidev@13{
+		compatible = "rohm,dh2228fv";
+		spi-max-frequency = <5000000>;
+		reg = <13>;
+	};
+};
+
 &spi2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi2_quad>;
@@ -301,7 +313,9 @@
 &i2s0 {
 	reg = <0x31002400 0x80>, <0x31002480 0x80>;
 	interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
-			<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+			<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 165 IRQ_TYPE_EDGE_RISING>
+			;
 	dma-channel = <10>, <11>;
 	status = "okay";
 };

arch/arm/boot/dts/sc59x.dtsi

@@ -275,22 +275,22 @@
 			timeout-sec = <30>;
 		};
 
-		spi0: spi@0x31042000 {
+		spi0: spi@0x3102e000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "adi,spi3";
-			reg = <0x31042000 0xFF>;
+			reg = <0x3102e000 0xFF>;
 			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			num-cs = <128>;
 			dma-channel = <22>, <23>;
 			status = "disabled";
 		};
 
-		spi1: spi@0x31043000 {
+		spi1: spi@0x3102f000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 			compatible = "adi,spi3";
-			reg = <0x31043000 0xFF>;
+			reg = <0x3102f000 0xFF>;
 			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 			num-cs = <128>;
 			dma-channel = <24>, <25>;

arch/arm/configs/sc594-som-ezkit_defconfig

@@ -32,6 +32,11 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_COREDUMP is not set
 # CONFIG_COMPACTION is not set
 CONFIG_NET=y
+CONFIG_VLAN_8021Q=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_MQPRIO=y
+CONFIG_NET_SCH_CBS=y
+CONFIG_NET_SCH_ETF=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_INET=y
@@ -42,6 +47,8 @@ CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_DIAG is not set
 CONFIG_NETWORK_PHY_TIMESTAMPING=y
 CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK=y
+CONFIG_NETFILTER_NETLINK_QUEUE=y
 CONFIG_CAN=y
 CONFIG_CFG80211=y
 CONFIG_CFG80211_WEXT=y
@@ -80,6 +87,7 @@ CONFIG_I2C_MUX=m
 CONFIG_I2C_ADI_TWI=y
 CONFIG_SPI=y
 CONFIG_SPI_ADI_V3=y
+CONFIG_SPI_SPIDEV=y
 CONFIG_PINCTRL_MCP23S08=y
 CONFIG_GPIO_SYSFS=y
 # CONFIG_HWMON is not set

arch/arm/mach-sc57x/sc57x-ezkit.c

@@ -22,7 +22,7 @@
 
 #include "core.h"
 
-#if IS_ENABLED(CONFIG_SND_SC5XX_SPORT)
+#if IS_ENABLED(CONFIG_SND_SC5XX_SPORT) || IS_ENABLED(CONFIG_SND_SC5XX_SPORT_SHARC)
 void sru_init(void)
 {
 	/* set DAI0_PIN02 to input */

arch/arm/mach-sc58x/Kconfig

@@ -36,22 +36,22 @@ config ARCH_SC58X_SLAVECORE_COUNT
 	  This sets the slave core count in sc58x processor.
 
 choice
-	prompt "Core Clock Divider"
-	default CCLK_DIV_1
+	prompt "SC58X Core Clock Divider"
+	default SC58X_CCLK_DIV_1
 	help
 	  This sets the frequency of the core. It can be 1, 2, 4 or 8
 	  Core Frequency = (PLL frequency) / (this setting)
 
-	config CCLK_DIV_1
+config SC58X_CCLK_DIV_1
 		bool "1"
 
-	config CCLK_DIV_2
+config SC58X_CCLK_DIV_2
 		bool "2"
 
-	config CCLK_DIV_4
+config SC58X_CCLK_DIV_4
 		bool "4"
 
-	config CCLK_DIV_8
+config SC58X_CCLK_DIV_8
 		bool "8"
 
 endchoice

arch/arm/mach-sc58x/include/mach/clkdev.h

@@ -8,19 +8,19 @@
 
 #include <linux/clk.h>
 
-#ifdef CONFIG_CCLK_DIV_1
+#ifdef CONFIG_SC58X_CCLK_DIV_1
 # define CONFIG_CCLK_DIV 1
 #endif
 
-#ifdef CONFIG_CCLK_DIV_2
+#ifdef CONFIG_SC58X_CCLK_DIV_2
 # define CONFIG_CCLK_DIV 2
 #endif
 
-#ifdef CONFIG_CCLK_DIV_4
+#ifdef CONFIG_SC58X_CCLK_DIV_4
 # define CONFIG_CCLK_DIV 4
 #endif
 
-#ifdef CONFIG_CCLK_DIV_8
+#ifdef CONFIG_SC58X_CCLK_DIV_8
 # define CONFIG_CCLK_DIV 8
 #endif
 

arch/arm/mach-sc58x/sc58x-ezkit.c

@@ -22,7 +22,7 @@
 
 #include "core.h"
 
-#if IS_ENABLED(CONFIG_SND_SC5XX_SPORT)
+#if IS_ENABLED(CONFIG_SND_SC5XX_SPORT) || IS_ENABLED(CONFIG_SND_SC5XX_SPORT_SHARC)
 void sru_init(void)
 {
 #if IS_ENABLED(CONFIG_MACH_SC589_MINI)

arch/arm/mach-sc59x/Kconfig

@@ -25,22 +25,22 @@ config ARCH_SC59X_SLAVECORE_COUNT
 	This sets the slave core count in sc59x processor.
 
 choice
-	prompt "Core Clock Divider"
-	default CCLK_DIV_2
+	prompt "SC59X Core Clock Divider"
+	default SC59X_CCLK_DIV_2
 	help
 	This sets the frequency of the core. It can be 1, 2, 4 or 8
 	Core Frequency = (PLL frequency) / (this setting)
 
-config CCLK_DIV_1
+config SC59X_CCLK_DIV_1
 	bool "1"
 
-config CCLK_DIV_2
+config SC59X_CCLK_DIV_2
 	bool "2"
 
-config CCLK_DIV_4
+config SC59X_CCLK_DIV_4
 	bool "4"
 
-config CCLK_DIV_8
+config SC59X_CCLK_DIV_8
 	bool "8"
 endchoice
 

arch/arm/mach-sc59x/icc.c

@@ -14,6 +14,7 @@ void platform_send_ipi_cpu(unsigned int cpu, int irq)
 	BUG_ON(cpu > 2);
 	writel(cpu + TRGM_SOFT3, __io_address(REG_TRU0_MTR));
 }
+EXPORT_SYMBOL(platform_send_ipi_cpu);
 
 void platform_send_ipi(cpumask_t callmap, int irq)
 {

arch/arm/mach-sc59x/include/mach/clkdev.h

@@ -8,19 +8,19 @@
 
 #include <linux/clk.h>
 
-#ifdef CONFIG_CCLK_DIV_1
+#ifdef CONFIG_SC59X_CCLK_DIV_1
 # define CONFIG_CCLK_DIV 1
 #endif
 
-#ifdef CONFIG_CCLK_DIV_2
+#ifdef CONFIG_SC59X_CCLK_DIV_2
 # define CONFIG_CCLK_DIV 2
 #endif
 
-#ifdef CONFIG_CCLK_DIV_4
+#ifdef CONFIG_SC59X_CCLK_DIV_4
 # define CONFIG_CCLK_DIV 4
 #endif
 
-#ifdef CONFIG_CCLK_DIV_8
+#ifdef CONFIG_SC59X_CCLK_DIV_8
 # define CONFIG_CCLK_DIV 8
 #endif
 

arch/arm/mach-sc59x/include/mach/sc59x.h

@@ -144,6 +144,9 @@
 /* ===================================
        Trigger Master Definitions
    =================================== */
+#define TRGM_SOFT0                            136           /* Software-driven Trigger 3 */
+#define TRGM_SOFT1                            137           /* Software-driven Trigger 3 */
+#define TRGM_SOFT2                            138           /* Software-driven Trigger 4 */
 #define TRGM_SOFT3                            139           /* Software-driven Trigger 3 */
 #define TRGM_SOFT4                            140           /* Software-driven Trigger 4 */
 #define TRGM_SOFT5                            141           /* Software-driven Trigger 5 */