[VTA][Chisel] Add the missing TestDefaultPynqConfig

[liangfu]

No description provided.

[vegaluisjose]

Hey @liangfu

One reason why I did not added this test is because the Pynq uses 32-bit addresses (pointers), requiring the virtual-translation used in sim-driver see

I have not tested the "TSIM" infrastructure with virtual-translation yet for these kinda devices, reason why I left it out atm.

On the other end, F1 FPGAs uses 64-bit address as most of the computers nowadays. Since memory instructions in VTA only allow 32-bit, I used this field for the most significant 32 bits of the address whereas the other 32-bits (the lsb of the address) is passed via VTA registers. See this.

I don't know if this make sense, but let me know if you have questions.

[vegaluisjose]

@liangfu also let me know if you want to try the chisel backend, and I'll let you know the steps needed.

[Ravenwater]

@vegaluisjose I would like to use the Chisel backend as well. Still trying to setup a regular Chisel environment, having some trouble getting IntelliJ with the Scala and SBT plugins to connect to the proper libraries. So, any help would be appreciated.

[vegaluisjose]

@Ravenwater I think we can move this to discuss forum, so others can benefit from it. You could start a thread there.

Thanks!

[Ravenwater]

done:

https://discuss.tvm.ai/t/getting-started-with-the-vta-chisel-backend/2987?u=ravenwater

[liangfu]

Thanks @vegaluisjose for your explanation, that makes total sense.

On the other hand, I had some experience in programming with Chisel3 and make the generated verilog code compiled on Intel FPGAs. I would send another PR in making chiselVTA integrated into Qsys.

[liangfu]

As TestDefaultPynqConfig is left to be unimplemented intentionally, I would close this PR for now.

[liangfu]

I have made a i386 version of tvm, and test of the TestDefaultPynqConfig was successful. Here is a full report:

Save load execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             2304
	uop_load_nbytes :                4
	out_store_nbytes:              576
	gemm_counter    :                0
	alu_counter     :               36
Padded load execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :            26880
	uop_load_nbytes :                4
	out_store_nbytes:             8448
	gemm_counter    :                0
	alu_counter     :              528
GEMM schedule:default execution statistics
	inp_load_nbytes :               64
	wgt_load_nbytes :             1024
	acc_load_nbytes :                0
	uop_load_nbytes :               20
	out_store_nbytes:              256
	gemm_counter    :               16
	alu_counter     :               48
GEMM schedule:smt execution statistics:
	inp_load_nbytes :               64
	wgt_load_nbytes :             2048
	acc_load_nbytes :                0
	uop_load_nbytes :               40
	out_store_nbytes:              256
	gemm_counter    :               16
	alu_counter     :               48
ALU SHL execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             4096
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
ALU MAX execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             4096
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
ALU MAX execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             8192
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
ALU ADD execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             4096
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
ALU ADD execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             8192
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
ALU SHR execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             4096
	uop_load_nbytes :                4
	out_store_nbytes:             1024
	gemm_counter    :                0
	alu_counter     :               64
Relu execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             5120
	uop_load_nbytes :                8
	out_store_nbytes:             1280
	gemm_counter    :                0
	alu_counter     :              160
Shift and scale execution statistics:
	inp_load_nbytes :                0
	wgt_load_nbytes :                0
	acc_load_nbytes :             1024
	uop_load_nbytes :                8
	out_store_nbytes:              256
	gemm_counter    :                0
	alu_counter     :               32

Can we give this a merge?

Update

Sorry, the previous log comes from the sim_driver. The tsim_driver for pynq test is still problematic in i386.