[LLVM] Support atomic for GPU backend (NVPTX, ROCm) #7051
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Laurawly
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Dec 8, 2020
zhiics
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Dec 8, 2020
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TusharKanekiDey
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Jan 20, 2021
* support atomic add on llvm * make atomic builtin intrin * test bincount on nvptx * use builtin::atomic_add * add atomic llvm codegen test, only works on int8 input somehow * supports fp32 atomic * drop support for cpu atomic * add comment * add atomic gpu unit test * reenable other tests * add doc string * run black * fix build with llvm 8 and older * fix format * do not run float32 atomic test on ci * do not run scatter_add 1d with float inputs on CI * fix typo * add todo comment for cpu backend * fix build on ci Co-authored-by: masa <[email protected]>
trevor-m
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Jan 21, 2021
* support atomic add on llvm * make atomic builtin intrin * test bincount on nvptx * use builtin::atomic_add * add atomic llvm codegen test, only works on int8 input somehow * supports fp32 atomic * drop support for cpu atomic * add comment * add atomic gpu unit test * reenable other tests * add doc string * run black * fix build with llvm 8 and older * fix format * do not run float32 atomic test on ci * do not run scatter_add 1d with float inputs on CI * fix typo * add todo comment for cpu backend * fix build on ci Co-authored-by: masa <[email protected]>
electriclilies
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Feb 18, 2021
* support atomic add on llvm * make atomic builtin intrin * test bincount on nvptx * use builtin::atomic_add * add atomic llvm codegen test, only works on int8 input somehow * supports fp32 atomic * drop support for cpu atomic * add comment * add atomic gpu unit test * reenable other tests * add doc string * run black * fix build with llvm 8 and older * fix format * do not run float32 atomic test on ci * do not run scatter_add 1d with float inputs on CI * fix typo * add todo comment for cpu backend * fix build on ci Co-authored-by: masa <[email protected]>
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This adds a new tir builtin
atomic_addand corresponding lowering rule for LLVM GPU backends. So far,atomic_addis introduced and used by CUDA topi, and LLVM based GPU backend cannot compile ops that use it (nms,scatter_add,argwhere).Unfortunately I couldn't get atomic_add working for CPU backend. There is some pointer cast issue that llvm IR verifier rejects. I think it is related to implicit cast to i8* done by LLVM CPU backend, but I haven't looked into details. So for now, only GPU backends support lowering atomic_add.
Other restriction is I've only supported 32 bit atomics. Supporting int64 atomic would be desirable but it looks complicated (need to generate CAS loop etc).
Obviously I'm a complete noob to atomic issues, any help would be appreciated.
please review @tqchen @zhiics @yzhliu @yidawang