🎯
Focusing
Assistant Professor at TU/e, studying synthesis, verification, and AI applications of emerging computing systems. Looking for prospective Ph.D. students.
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Eindhoven University of Technology
- Eindhoven, the Netherlands
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09:40
(UTC +02:00) - https://changmg.github.io/
Highlights
- Pro
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SJTU-ECTL/ALSRAC
SJTU-ECTL/ALSRAC PublicALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set
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SJTU-ECTL/VECBEE
SJTU-ECTL/VECBEE PublicVECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis
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SJTU-ECTL/MECALS
SJTU-ECTL/MECALS PublicAn approximate logic synthesis tool under the maximum error constraint
Verilog 6
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AppMult-Aware-Retraining
AppMult-Aware-Retraining PublicPytorch implementation of approximate multiplier-aware retraining for DNNs, DATE 2025
C++ 6
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