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ARM64: Optimize redundant memory loads with mov #35141

@kunalspathak

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@kunalspathak
ldr     w1, [fp,#28]
ldr     w0, [fp,#28]

The 2nd load can be converted into mov which takes 2 fewer cycles than ldr.

ldr     w1, [fp,#28]
mov     w0, w1

I collected no. of such ldr pairs in framework libraries and found approx. 540 pairs in 300 methods.

Details:

ldr_to_mov.txt

category:cq
theme:optimization
skill-level:intermediate
cost:small

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    arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMImemory modelissues associated with memory model

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