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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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#77540 introduced a JIT peephole optimization to convert consecutive ldr/str instructions to ldp/stp. It was limited to avoiding this optimization when either of the two ldr/str represented lclvar, which requires more work to properly handle the GC effects.
See #77540 (review) for more discussion.
This issue tracks generalizing the optimization to handle the lclvar cases.
Also, the optimization was restricted to not work in prologs or epilogs, to avoid affecting unwind codes. There are two potential improvements here:
- Make sure the unwind codes work with the optimization.
- Allow the optimization in the non-OS (not unwindable) part of the prolog/epilog.
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arch-arm64area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMICLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI